Memory Circuit Voltage Generation for Write Margin
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Solution Overview
Problem
As semiconductor process technology advances, integrated circuits face reduced write margins due to lower supply voltages, which degrade memory bit-cell performance, necessitating a solution to enhance write margins while maintaining low power consumption.
Innovation Solution
The implementation of column circuitry with voltage generation circuits to provide negatively boosted bit-cell supply and bit-line voltages during write operations, allowing for increased write margins by applying a full operating voltage at the word-line and boosting logic low bit-line voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If lower supply voltage is used to reduce power consumption, then power consumption is reduced, but write margin of bit-cells is degraded
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the supply voltage to bit-cells during write operations. Specifically, it raises the supply voltage to a higher level (VDDH) when writing data to bit-cells, then restores it to the normal lower level (VDD) afterward. This temporal parameter change allows the system to maintain low power consumption during non-write operations while ensuring sufficient write margin during write operations, thus resolving the contradiction between power consumption and write margin.
2Use of energy by moving object
If lower supply voltage is used, then power consumption is reduced, but data transition speed and reliability are degraded
Solution Approach 1:
The patent resolves this contradiction by temporarily changing the supply voltage parameter to a higher value (VDDH) during write operations, which accelerates data transition speed in bit-cells. After the write operation completes, the voltage is restored to the lower normal level (VDD), maintaining low power consumption during non-write operations. This temporal parameter adjustment allows the system to achieve high speed when needed while conserving power during normal operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases write margins by lowering the switch point of bit-cells, enhancing data transition speed and reliability while conserving power by restoring voltages after write operations.
Implementation Method 1
a first voltage generation circuit coupled to a first power supply terminal and the first voltage supply terminal, the first voltage generation circuit configured to provide a first reduced voltage at the first voltage supply terminal during the first write operation, the first reduced voltage being lower than the first voltage; and a second voltage generation circuit coupled to a second power supply terminal and to the second voltage supply terminal, the second voltage generation circuit configured to provide at the second voltage supply terminal a second reduced voltage during the first write operation
Data Source
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AI summary
A memory circuit includes a plurality of bit-cells organized in a column. Each bit-cell of the plurality is coupled to first and second voltage supply terminals, and first and second bit-lines. A word-line is coupled to a bit-cell of the plurality and configured to receive a first voltage during a first write operation. A first voltage generation circuit is coupled to the first voltage supply terminal and is configured to provide a first reduced voltage during the first write operation. A second voltage generation circuit is coupled to the second voltage supply terminal and is configured to provide a second reduced voltage during the first write operation.