Memory Clock Generation Without Local Oscillator

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Integrated circuits used in microcomputers for handheld and portable applications face increased power consumption due to the integration of serial presence detect (SPD) and temperature sensing functions, which is not optimized for power management, leading to inefficiencies in power-down modes.

Innovation Solution

A combined SPD and temperature sensor IC with a power management circuit that enables/disables the oscillator and band gap reference circuit based on operation modes, using an additional clock generator for EEPROM read operations and employing I2C master controller logic to generate read commands, allowing for reduced power consumption by powering down unnecessary components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the oscillator is permanently powered to enable clocking for both SPD and temperature sensing functions, then the integrated circuit can perform both functions reliably, but the power consumption increases significantly

Engineering Contradiction:
Improvefunctional reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent divides the clocking functionality into two separate paths: one using the integrated oscillator for temperature sensing operations, and another using an externally provided clock signal for SPD operations. This segmentation allows each function to use the most appropriate clock source, enabling the oscillator to be powered down during SPD-only operations while maintaining reliable clocking when needed

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic power management by enabling the oscillator only when temperature sensing functionality is required, and disabling it during SPD-only operations. The system adapts its power consumption based on the current operational mode, transitioning between static (oscillator off) and dynamic (oscillator on) states to optimize energy efficiency

Inventive Principle:
Principle #15Dynamics

2Ease of manufacture

If the integrated circuit is designed as a common platform with full functionality for both SPD and temperature sensing, then manufacturing costs are reduced through standardization, but power consumption increases for variants that don't require full functionality

Engineering Contradiction:
Improvemanufacturing standardizationVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

The patent enables the integrated circuit to dynamically adapt its operational mode based on the application requirements. The system can operate in temperature sensing mode (with oscillator powered), SPD-only mode (with oscillator powered down), or both functions simultaneously, allowing a single standardized platform to serve multiple market segments with different power requirements

Inventive Principle:
Principle #15Dynamics

3Use of energy by moving object

If the oscillator is disabled to reduce power consumption during SPD operations, then power efficiency improves, but the circuit cannot perform temperature sensing operations that require local clocking

Engineering Contradiction:
Improvepower efficiencyVSAvoidfunctional adaptability
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The patent makes the I2C interface universally compatible with both SPD and temperature sensing operations. The same I2C interface can communicate with either the SPD EEPROM or the temperature sensor depending on the operational mode, allowing the system to be versatile without requiring separate dedicated interfaces for each function

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2102754B1Clock generation for memory access without a local oscillator
Publication Date: 2013.03.20 NXP BV
  • EP2102754B1 patent drawingFigure 1A~1B
  • EP2102754B1 patent drawingFigure 2
  • EP2102754B1 patent drawingFigure 3

AI summary

A method of accessing electronic memory is provided in electronic circuits where it is desired to lower power consumption and hence there is no active oscillator at the time when access to data within the electronic memory is required. The invention provides a method therefore for accessing the electronic memory from a controller, which generates its own clock signals from a data, communications bus electrically coupled to the controller. Advantageously the method allows for memory access to be continued in integrated circuits where a subset of circuits are powered down to reduce power consumption, and one of the subset of circuits is an oscillator.