Memory Device Data Clock Synchronization Extension
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Solution Overview
Problem
The synchronization of a data clock signal in memory devices is temporarily disabled to reduce power consumption, leading to delays in subsequent data processing due to the time required to re-enable synchronization.
Innovation Solution
An operating method for a memory device that extends the synchronization of a data clock signal by receiving commands from a memory controller to prepare toggling during a preparation time period and process data streams based on the extended synchronization, allowing continuous toggling and reducing the need for additional synchronization initiation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If synchronization of data clock signal is disabled to reduce power consumption, then power consumption is reduced, but data processing speed deteriorates due to re-enablement delays
Solution Approach 1:
The patent applies preliminary action by extending the synchronization period of the data clock signal beyond the immediate data processing need. The memory device maintains synchronized toggling of the data clock signal for a predetermined extended period after data processing completes, so that when the next data processing operation begins, synchronization is already established or quickly re-established, avoiding the delay of re-enabling synchronization and reducing the need to frequently toggle synchronization states
2Productivity
If synchronization of data clock signal is re-enabled for next data processing, then data processing capability is restored, but processing time is delayed due to re-enablement time
Solution Approach 1:
The patent applies continuity of useful action by maintaining the synchronized toggling state of the data clock signal for an extended period continuously. Instead of disabling and re-enabling synchronization between data processing operations, the signal remains in a synchronized toggling state throughout, ensuring continuous readiness for data processing operations and eliminating interruptions or delays caused by re-enablement
Data Source
AI summary
Disclosed is an operating method of a memory device communicating with a memory controller, which includes receiving a first command from the memory controller, the first command indicating initiation of synchronization of a data clock signal and defining a clock section corresponding to the synchronization, preparing a toggling of the data clock signal during a preparation time period, processing a first data stream based on the data clock signal toggling at a reference frequency, and processing a second data stream based on the data clock toggling at the reference frequency and extended for a period of the defined first clock section.