Nonvolatile Memory Close Unit Coupling Mitigation
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Solution Overview
Problem
As the degree of integration of flash memory devices increases, the narrower spaces between memory cells lead to increased coupling effects, which can disturb data, necessitating a method to prevent data disturbance and improve reliability in nonvolatile memory devices.
Innovation Solution
A nonvolatile memory device with a memory cell array that includes memory blocks with pages, a row decoder circuit to select pages and memory cells, and a page buffer circuit to write data and dummy data into selected memory cells, adjusting the size of the close unit during a close operation to mitigate coupling effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the degree of integration of flash memory devices is improved, then storage capacity increases, but coupling between memory cells increases causing data disturbance
Solution Approach 1:
The patent applies preliminary action by performing a close operation before normal operations. The close operation writes dummy data into memory cells of a close unit within an opened memory block, preparing the memory block for subsequent read or program operations. This preliminary preparation prevents data disturbance caused by coupling effects during later operations, while maintaining high storage capacity through improved integration.
Solution Approach 2:
The patent uses dummy data as an intermediary substance to mitigate coupling effects. By writing dummy data into the close unit, the dummy data acts as a mediator that prevents the coupling between memory cells from disturbing actual stored data. This intermediary approach allows high-density integration while protecting data integrity.
2Reliability
If a close operation is performed to prevent data disturbance, then data reliability improves, but operation time increases
Solution Approach 1:
The patent applies local quality by selectively performing the close operation only on a specific close unit within the opened memory block, rather than the entire block. The row decoder circuit identifies and selects only the necessary close unit that requires dummy data writing. This localized approach maintains data reliability for critical areas while minimizing the time penalty by avoiding unnecessary operations on the entire memory block.
Solution Approach 2:
The patent uses partial action by performing the close operation on only a portion (close unit) of the memory block rather than the whole. This partial approach provides sufficient protection against coupling effects for the critical data areas while reducing the overall operation time compared to processing the entire memory block.
3Object-affected harmful factors
If dummy data is written into memory cells, then coupling effects are mitigated, but manufacturing complexity increases
Solution Approach 1:
The patent applies universality by using the existing page buffer circuit and row decoder circuit for multiple functions. The page buffer circuit that normally writes actual data also writes dummy data during the close operation. The row decoder circuit that normally selects memory cells for data operations also selects the close unit for dummy data writing. This multi-functional use of existing circuits mitigates coupling effects without adding complex manufacturing requirements.
Solution Approach 2:
The patent uses self-service by having the memory device perform the close operation autonomously using its own internal circuits. The control logic within the memory device automatically identifies the close unit and writes dummy data without requiring external intervention or complex manufacturing modifications. The existing infrastructure serves the dual purpose of data storage and coupling mitigation.
Data Source
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AI summary
A nonvolatile memory device includes a memory cell array that includes memory blocks, wherein each of the memory blocks includes pages each including memory cells, a row decoder circuit that selects one of the pages from a selected memory block of the memory blocks in a write operation and selects memory cells of a close unit from the selected memory block in a close operation, and a page buffer circuit that writes data into memory cells of a page selected by the row decoder circuit in the write operation and writes dummy data into the memory cells of the close unit selected by the row decoder circuit in the close operation. The close unit includes one or more pages, and, in the close operation, the row decoder circuit adjusts a size of the close unit.