Memory Codeword Balancing With Placeholder Bits
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Solution Overview
Problem
Memory devices face challenges in balancing data to implement improved sensing schemes while ensuring error correction, as balancing data conflicts with applying error correction codes, leading to unbalanced codewords and disrupted error detection.
Innovation Solution
A memory device generates a codeword composed of data, parity, and placeholder bits, where the bits are mapped to packets to maintain validity during balancing, allowing for balanced data storage and error correction without disrupting the error correction code's efficacy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If data is balanced to implement improved sensing schemes, then sensing accuracy is improved, but error correction code effectiveness is disrupted
Solution Approach 1:
The codeword is segmented into data bits and placeholder bits, where placeholder bits are strategically positioned to maintain error correction code validity during balancing operations. This segmentation allows the data portion to be balanced while the placeholder portion preserves ECC integrity.
Solution Approach 2:
Placeholder bits act as intermediaries between the data bits and the error correction code. These placeholder bits absorb the effects of balancing operations while maintaining the mathematical validity of the codeword for error correction purposes.
2Reliability
If placeholder bits are included in the codeword, then error correction is maintained, but memory cell usage increases
Solution Approach 1:
The placeholder bits are extracted from the traditional data storage portion and placed in dedicated positions within the codeword structure. This extraction allows the memory device to optionally omit storing placeholder bits while maintaining error correction functionality through the mapping relationship.
Solution Approach 2:
The system changes the parameter of placeholder bit storage from mandatory to optional by implementing a mapping scheme where placeholder bits can be derived or reconstructed, reducing memory cell requirements while preserving error correction capability.
Data Source
AI summary
Methods, systems, and devices for generating a balanced codeword protected by an error correction code are described. A memory device receives data bits for storage. Based on the data bits, the memory device generates a codeword that includes the data bits, parity bits, and placeholder bits. The memory device balances the codeword by inverting one or more packets of the codeword. After balancing the codeword, the memory device stores at least a portion of the codeword in memory so that a later operation or a decoding process reveals the packets that were inverted as part of the balancing process. Accordingly, the memory device is able to re-invert the appropriate packets to recover the original data bits.