Memory Codeword Format Using Inversion and Dual Parity Checks
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Solution Overview
Problem
Memory technologies face errors due to incorrect storage of high or low charges or voltages in bitcells, which can occur during write operations or subsequent changes, leading to data corruption.
Innovation Solution
An integrated circuit with a memory system and a controller circuit that generates and processes codewords with specific formats, including bit positions for data, bitwise inversion, odd parity, and even parity values, to detect and correct errors by determining bit errors and parity values, ensuring accurate data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional single-bit storage is used in memory cells, then the device complexity is low and manufacturing is simple, but the reliability of data storage deteriorates due to errors during write operations and subsequent changes
Solution Approach 1:
The data is segmented into multiple components within the codeword structure: original data bits, inverted data bits, odd parity bits, and even parity bits. This segmentation allows independent verification of each component, enabling error detection and correction while maintaining manageable complexity through structured organization
Solution Approach 2:
Parity bits serve as intermediary elements that mediate between the stored data and verification processes. The odd and even parity bits act as intermediaries that enable cross-validation of data integrity without requiring complex error correction algorithms, thus improving reliability while controlling complexity
2Reliability
If parity check bits are added to detect errors, then the reliability of data retrieval is improved, but the loss of information increases due to additional bits required for error detection
Solution Approach 1:
The patent merges multiple functions into the codeword structure: data storage, error detection, and error correction capabilities are combined in a single integrated format. The inverted data bits and dual parity systems work together to provide both detection and correction functions, maximizing the utility of added bits while minimizing information loss
Solution Approach 2:
The codeword structure functions as a composite information structure, combining different types of bits (original data, inverted data, odd parity, even parity) with distinct functions. This composite approach allows the system to achieve high reliability through multiple layers of verification while optimizing the ratio of useful data to overhead bits
3Reliability
If bitwise inversion is implemented in the codeword format, then the ability to detect and correct errors is enhanced, but the device complexity increases due to additional processing requirements
Solution Approach 1:
The bitwise inversion is applied locally to specific portions of the data (creating inverted data bits) rather than requiring global system changes. This localized approach allows error detection through comparison of local inverted vs. non-inverted bits, enhancing reliability while keeping the overall logic circuit complexity manageable through targeted rather than universal processing
Data Source
AI summary
The present disclosure generally relates to a codeword format for data storage and to methods and circuits for generating a codeword based on data to be written in memory and extracting data from a codeword read from memory. In an example, an integrated circuit includes a memory system and a controller circuit. The controller circuit is communicatively coupled to the memory system and is configured to: receive multi-bit data; generate a codeword based on the multi-bit data; and transmit to the memory system the codeword for writing to memory. The codeword has a format that includes first bit positions for the multi-bit data, second bit positions for a bitwise inversion of the multi-bit data, a third bit position for an odd parity value, and a fourth bit position for an even parity value. The odd and even parity values indicate an odd and even parity, respectively, of the multi-bit data.