Nonvolatile Memory Read-While-Write Collision Manager
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Solution Overview
Problem
Conventional systems face challenges in managing collisions between read and write requests in non-volatile memory, particularly when secure and standard processing cores share data partitions, leading to inefficiencies and increased costs due to the need for separate memory partitions.
Innovation Solution
A system with control circuitry and registers that manages read-while-write collisions by suspending write operations, storing read data in registers, and providing it to processing cores, allowing secure and standard cores to share data partitions without interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate memory partitions are provided for secure and standard processing cores, then data security and isolation are improved, but memory area and system cost increase
Solution Approach 1:
The patent merges secure and standard processing cores into a shared memory partition, allowing them to access the same memory space through controlled interfaces. This eliminates the need for physically separate memory partitions while maintaining security through the collision management logic that prevents unauthorized access and manages read-write conflicts between secure and standard cores.
2Reliability
If separate memory partitions are provided for secure and standard processing cores, then data isolation is improved, but system cost increases
Solution Approach 1:
The patent combines multiple processing cores into a single shared memory partition, reducing the overall memory capacity required and simplifying the system architecture. This merging approach lowers manufacturing costs while maintaining data isolation through software-controlled access management and collision detection logic.
Solution Approach 2:
The shared memory partition serves multiple functions by accommodating both secure and standard processing cores simultaneously. The memory interface is designed to handle different types of access requests (read, write, read-while-write) from different core types, making the system more versatile and cost-effective.
3Reliability
If read-while-write collision management is implemented, then data integrity is improved, but access speed decreases
Solution Approach 1:
The patent implements preliminary collision detection by monitoring memory access requests before they are executed. When a read-while-write collision is detected, the system proactively suspends the write operation before it can compromise data integrity, then resums it after the read operation completes. This preliminary detection and control mechanism prevents data corruption while minimizing access delays.
4Productivity
If multiple processing cores share a data partition, then resource utilization is improved, but collision management complexity increases
Solution Approach 1:
The patent introduces an intermediary collision management interface between multiple processing cores and the shared memory partition. This interface monitors all access requests, detects collisions between read and write operations, and coordinates their execution to prevent data corruption. The intermediary layer abstracts the complexity of collision management from individual cores while enabling efficient shared access.
Data Source
AI summary
A non-volatile memory receives a data read request from a processing core of a plurality of processing cores. The read request is directed to a data partition of a non-volatile memory. The non-volatile memory determines whether to process the read request using read-while-write collision management. When it is determined to process the read request using read-while-write collision management, an address associated with the read request is stored in an address register of a set of registers associated with the processing core. Write operations directed to the data partition are suspended. A read operation associated with the read request is executed while the write operations are suspended and data responsive to the read operation is stored in one or more data registers of the set of registers. The data stored in the one or more data registers of the set of registers is provided to the processing core.