Memory Colour Tagging for Fine-Grained Execution Protection

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Solution Overview

Problem

Existing CPU-based products, including security products like smartcards, face attacks such as buffer overflow, stack overflow, Java Program Counter (JPC), and Java Stack Pointer (JSP) attacks, which current counter measures like software bound checking and canary or double stack protection fail to address effectively without performance penalties.

Innovation Solution

An execution system with a central processing unit, system memory, and a secure agent component that includes a colour memory created during compilation, associating colour tags with memory addresses for protected data, and comparing these tags during load and store instructions to detect discrepancies, raising an alarm for attacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If software bound checking, canary or double stack protection is used, then security against buffer overflow and stack attacks is improved, but performance deteriorates due to additional checking overhead

Engineering Contradiction:
Improvesecurity protectionVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The colour memory is created at compilation time, pre-associating colour tags with memory addresses before execution. This preliminary preparation eliminates the need for runtime generation of protection data, reducing performance overhead while maintaining security

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The colour memory creates a simplified copy of the program's memory address structure with associated colour tags. This copy allows rapid comparison operations without processing the entire program data, improving performance while providing comprehensive protection

Inventive Principle:
Principle #26Copying

2Reliability

If MPU (Memory Protection Unit) is used, then memory protection is provided, but granularity is insufficient to detect fine-grained attacks like buffer overflow

Engineering Contradiction:
Improvememory protectionVSAvoidprotection granularity
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

Each memory address is assigned a specific colour tag that provides fine-grained identification. This local differentiation allows precise detection of unauthorized memory accesses, such as buffer overflow attacks, by comparing colour tags at specific addresses rather than using coarse-grained MPU regions

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The memory protection is segmented into individual address-level colour tags rather than using large MPU regions. This segmentation enables precise identification and protection of specific data structures and buffers, providing the granularity needed to detect fine-grained attacks

Inventive Principle:
Principle #1Segmentation

3Reliability

If security protection mechanisms are added to genuine programs, then security is improved, but the genuine program must be modified which increases complexity

Engineering Contradiction:
Improvesecurity protectionVSAvoidprogram modification
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The secure agent component acts as an intermediary between the CPU and memory, handling all colour tag comparisons and security checks. This mediator approach provides security protection without requiring modifications to the genuine program code, maintaining program simplicity while improving security

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12572646B2Execution protection using data colouring
Publication Date: 2026.03.10 THALES DIS FRANCE SA
  • US12572646B2 patent drawing
  • US12572646B2 patent drawing
  • US12572646B2 patent drawing

AI summary

Provided is a system for execution protection using data colouring. The system includes a central processing unit (CPU), a system memory (SM) and a secure agent component (SAC). The SAC monitors memory access instructions occurring between the CPU and SM. The SAC comprises a colour memory (CM) storing a colour tag for each memory address of the system memory (SM). The SAC stores instructions at a destination address, and copies the colour tag stored at the instruction address in the colour memory to the destination address in the colour memory (CM) while storing data. The SAC loads instruction at a retrieval address, and compares the colour tag stored at the retrieval address and the colour tag at the load instruction in the colour memory (CM). A dysfunction is detected if colour tags are different. Other embodiments disclosed.