Semiconductor Memory Column Control Circuit Address Pointer
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Solution Overview
Problem
Current semiconductor memory technologies face challenges in enhancing data input/output speed, operation reliability, and reducing manufacturing costs, particularly in flash memory systems where complex circuitry and large-scale address counters hinder efficient column control.
Innovation Solution
The implementation of a column control circuit with a control unit that uses a pointer corresponding to an external address signal to generate control signals, eliminating the need for an address counter by sequentially changing column units and column control units synchronously with a clock, thereby simplifying the circuit configuration and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a conventional address counter is used for column control, then address sequencing can be achieved, but the circuit complexity increases and manufacturing cost rises
Solution Approach 1:
The patent extracts and removes the address counter from the column control circuit. Instead of using a conventional address counter to generate column select signals, the invention uses a simplified pointer register that is directly updated by the column address input, eliminating the need for complex counting logic and reducing circuit complexity while maintaining column control functionality.
Solution Approach 2:
The patent uses a pointer register that copies the column address input directly to control column selection. This copying mechanism replaces the need for an address counter, as the pointer register simply holds and uses the provided column address value to generate the appropriate column select signals, thereby simplifying the circuit configuration.
2Reliability
If complex circuitry is used to achieve reliable column control, then operation reliability improves, but manufacturing cost increases
Solution Approach 1:
By removing the address counter from the column control path, the patent reduces the number of components that need to be manufactured and assembled. This extraction of unnecessary complexity lowers manufacturing costs while the remaining simplified circuit maintains reliability through direct address-to-pointer mapping with proper timing control.
Solution Approach 2:
The patent changes the operational parameters of the column control by using synchronous updating with a clock signal. The pointer register is updated only on clock edges, which provides reliable timing control and ensures operation reliability without requiring complex additional circuitry, thereby keeping manufacturing costs low.
3Productivity
If high-speed data input/output is implemented, then productivity improves, but the timing margins for address counter operation decrease
Solution Approach 1:
By eliminating the address counter, the patent removes the timing-critical counting operation that limited data input/output speed. The simplified pointer register update mechanism requires fewer timing steps, increasing the speed at which column addresses can be processed and thereby improving productivity without sacrificing timing margins.
Solution Approach 2:
The patent prepares the pointer register to be ready for immediate updating by the column address input. The pointer register is pre-configured to accept and process the column address on the next clock edge, eliminating delays associated with address counter initialization and counting operations, thus enabling faster data input/output operations.
Data Source
AI summary
According to one embodiment, a semiconductor memory includes a memory cell array which includes memory cells, the memory cells being arranged along a row direction and a column direction and storing data respectively corresponding to thresholds, a row control circuit which controls a row of the memory cell array, and a column control circuit which includes a control unit, the control unit generating a signal to control elements corresponding to column of the memory cell array in accordance with a pointer corresponding to an external address signal.