Semiconductor Memory Device Command Input Modes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor memory devices face challenges in efficiently managing command sets and data operations, particularly in reducing the time required for inputting command sets while performing data-output operations.
Innovation Solution
The semiconductor memory device is designed to operate in multiple modes (MODEa and MODEb), where in MODEb, command data and address data can be inputted via external control terminals even during data-output operations, significantly reducing the time needed for inputting command sets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If command sets are inputted sequentially during data-output operations, then operational reliability is maintained, but input time increases
Solution Approach 1:
The patent implements dynamic operational modes (MODEa and MODEb) that allow the memory device to switch between different command input methods. In MODEb, the device dynamically accepts command sets during data-output operations, adapting the input timing flexibility based on operational state to reduce overall input time while maintaining reliability through controlled mode transitions
Solution Approach 2:
The patent employs preliminary action by preparing and buffering command sets in advance during idle periods or data-output operations. The command register and control circuitry pre-process incoming commands, allowing faster execution when needed without compromising operational reliability
2Adaptability or versatility
If multiple operational modes are implemented, then operational flexibility increases, but device complexity increases
Solution Approach 1:
The patent implements multi-functionality by designing a unified control architecture that handles both sequential command input (MODEa) and simultaneous command-input during data-output (MODEb). The control circuit, command register, and state machine serve multiple purposes across different modes, reducing the need for separate dedicated circuits for each operational mode
Solution Approach 2:
The patent uses dynamic mode switching with a mode selection signal that transitions the device between operational states. This dynamic approach allows a single flexible architecture to replace multiple static designs, managing complexity through controlled adaptability rather than permanent multi-structure implementations
Data Source
AI summary
A semiconductor memory device comprises: a first pad receiving a first signal; a second pad receiving a second signal; a first memory cell array; a first sense amplifier connected to the first memory cell array; a first data register connected to the first sense amplifier and configured to store user data read from the first memory cell array; and a control circuit configured to execute an operation targeting the first memory cell array. The first memory cell array comprises a plurality of first memory strings. The first memory strings each comprise a plurality of first memory cell transistors. In a first mode of this semiconductor memory device, a command set instructing the operation is inputted via the first pad. In a second mode of this semiconductor memory device, the command set is inputted via the second pad.