Memory Command Scheduling for Mixed Deterministic and NVM Traffic

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Solution Overview

Problem

Conventional memory controllers struggle to support non-volatile memory components due to out-of-order responses and latency discrepancies when mixed with volatile memory components, leading to increased latency and energy consumption.

Innovation Solution

A memory sub-system with extended order buffer arbiters and command schedulers that adapt to traffic conditions and prioritize commands based on destination device type, reducing latency and on-chip buffer requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional memory sub-systems handle both volatile and non-volatile memory ranks on the same channel, then memory capacity and versatility are improved, but latency and energy consumption increase due to timing characteristic discrepancies

Engineering Contradiction:
Improvesupport for multiple memory typesVSAvoidcommand latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The command queue is segmented into separate queues for deterministic commands and non-deterministic commands. The arbiter is segmented to independently manage these queues, allowing each memory type to be handled with appropriate timing characteristics without interference from the other type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arbiter dynamically adjusts its behavior based on the state of intermediate command queues and command expiration status. It can switch between prioritizing deterministic commands and allowing non-deterministic commands to proceed, adapting to real-time system conditions to minimize overall latency.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If conventional memory sub-systems handle both volatile and non-volatile memory ranks on the same channel, then memory capacity and versatility are improved, but energy consumption increases due to timing characteristic discrepancies

Engineering Contradiction:
Improvesupport for multiple memory typesVSAvoidenergy consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The command queue is segmented into separate queues for deterministic commands and non-deterministic commands. The arbiter is segmented to independently manage these queues, allowing each memory type to be handled with appropriate timing characteristics without interference from the other type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arbiter dynamically adjusts its behavior based on the state of intermediate command queues and command expiration status. It can switch between prioritizing deterministic commands and allowing non-deterministic commands to proceed, adapting to real-time system conditions to minimize overall latency.

Inventive Principle:
Principle #15Dynamics

3Reliability

If deterministic commands are prioritized in the command queue, then timing precision and reliability are improved, but non-deterministic command throughput decreases

Engineering Contradiction:
Improvedeterministic command timingVSAvoidnon-deterministic command throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The command queue is segmented into separate queues for deterministic commands and non-deterministic commands. The arbiter is segmented to independently manage these queues, allowing each memory type to be handled with appropriate timing characteristics without interference from the other type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arbiter monitors the state of intermediate command queues and uses this feedback to adjust its arbitration decisions. When intermediate queues indicate readiness, the arbiter can safely prioritize deterministic commands; when not ready, it can allow non-deterministic commands to proceed, maintaining both reliability and throughput.

Inventive Principle:
Principle #23Feedback

4Productivity

If non-deterministic commands are allowed to proceed without restriction, then command throughput is improved, but timing precision and latency for deterministic commands worsen

Engineering Contradiction:
Improvecommand throughputVSAvoiddeterministic command latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The command queue is segmented into separate queues for deterministic commands and non-deterministic commands. The arbiter is segmented to independently manage these queues, allowing each memory type to be handled with appropriate timing characteristics without interference from the other type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arbiter dynamically adjusts its behavior based on the state of intermediate command queues and command expiration status. It can switch between prioritizing deterministic commands and allowing non-deterministic commands to proceed, adapting to real-time system conditions to minimize overall latency.

Inventive Principle:
Principle #15Dynamics

5Productivity

If large on-chip buffers are used to handle both command types, then command handling capability is improved, but on-chip buffer requirements and device complexity increase

Engineering Contradiction:
Improvecommand handling capabilityVSAvoidon-chip buffer requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The command queue is segmented into separate queues for deterministic commands and non-deterministic commands. The arbiter is segmented to independently manage these queues, allowing each memory type to be handled with appropriate timing characteristics without interference from the other type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different buffer management strategies are applied to different command types. Deterministic commands receive guaranteed buffer allocation with strict timing, while non-deterministic commands use available buffer space more flexibly. This local differentiation optimizes buffer usage without requiring uniformly large buffers for all commands.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12613659B2Memory sub-system for supporting deterministic and non-deterministic commands based on command expiration and the state of the intermediate command queue
Publication Date: 2026.04.28 LODESTAR LICENSING GROUP LLC
  • US12613659B2 patent drawing
  • US12613659B2 patent drawing
  • US12613659B2 patent drawing

AI summary

Commands in a command queue are received and scheduled. For each of the commands, scheduling includes determining an age of a command based on an entrance time of the command in the command queue. When the age of the command satisfies a first threshold, marking all other commands in the command queue as not issuable when the command is a deterministic command, and marking all other commands in the command queue as not issuable when the command is a non-deterministic command and the intermediate command queue is not empty. Scheduling the command further includes determining whether the command is a read command and marking the command as not issuable when the command is a non-deterministic read command and the intermediate command queue is empty.