Memory Device Command Priority Scheduling
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Solution Overview
Problem
Existing memory devices face delays in response times due to sequential processing of commands, which hinders fast and real-time performance, especially for read or write commands requiring low latency, leading to system performance deterioration.
Innovation Solution
A memory device with control logic that decodes input information to change the execution sequence of commands based on priority information, using a packet decoder, command queue, arbiter, bank state block, and write data queue to prioritize and schedule commands effectively, ensuring timely execution of high-priority commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the memory device sequentially processes commands in the order they are received, then the processing order is simple and predictable, but the response time is delayed and latency increases
Solution Approach 1:
The memory device performs preliminary actions by receiving and storing multiple commands in a command queue before execution. The device prepares the command structure in advance, allowing it to reorder and prioritize commands based on latency requirements before actual execution, thus reducing response time without proportionally increasing complexity
Solution Approach 2:
A command queue structure is introduced as an intermediary between command reception and execution. This intermediary component allows the device to buffer commands, apply priority-based reordering, and manage execution timing without requiring complex real-time processing logic, thereby reducing latency while maintaining manageable device complexity
2Productivity
If the memory device generates and executes auxiliary commands automatically, then the memory operations are more complete and reliable, but the overall processing speed decreases
Solution Approach 1:
The memory device performs preliminary actions by receiving and storing multiple commands in a command queue before execution. The device prepares the command structure in advance, allowing it to reorder and prioritize commands based on latency requirements before actual execution, thus reducing response time without proportionally increasing complexity
Solution Approach 2:
The command queue enables continuous processing of commands without idle gaps. By maintaining a buffer of ready-to-execute commands and continuously selecting the next appropriate command based on priority and timing requirements, the device sustains high productivity while ensuring complete memory operations through the structured command sequence
Data Source
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AI summary
A memory device and a method of operating the same are provided. The memory device includes a control logic and a memory cell array. The control logic is configured to receive input information including a plurality of commands, a plurality of addresses, and priority information, and to change an execution sequence of the received commands of the input information according to the priority information. The memory cell array is configured to include a plurality of memory cells, and the memory device is configured to perform an operation on one or more memory cells based on the changed execution sequence.