Memory Command Assignment Based on Processor Workload

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Solution Overview

Problem

Existing memory devices face challenges in efficiently handling high IOPS requirements due to workload imbalances, leading to inefficiencies and increased costs, power consumption, and resource wastage.

Innovation Solution

Implementing a dynamic dispatching system that allows memory commands to be dynamically assigned to processors dedicated to specific command types, only shifting commands to other processors when workload conditions are met, thereby optimizing processor utilization without adding more dedicated processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If more dedicated processors are added to handle high IOPS requirements, then processing capacity and IOPS are improved, but device complexity and cost increase

Engineering Contradiction:
ImproveIOPSVSAvoidprocessor configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements command processor sharing where a single command processor can dynamically handle multiple command types (read, write, erase) based on workload conditions. Instead of having separate dedicated processors for each command type, the system allows processors to be reassigned based on real-time workload demands, making each processor universal rather than specialized. This reduces the total number of processors needed while maintaining high IOPS capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If dedicated processors are used for specific command types, then command processing efficiency is improved, but processor utilization and resource usage worsen due to workload imbalances

Engineering Contradiction:
Improvecommand processing efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent introduces dynamic command processor assignment where processors are not statically bound to specific command types but are dynamically reassigned based on workload conditions. The system monitors workload metrics and reassigns processors from low-utilization command types to high-utilization command types in real-time. This dynamic adaptation ensures that processing capacity is always aligned with actual demand, maximizing utilization and minimizing energy waste from idle processors.

Inventive Principle:
Principle #15Dynamics

3Reliability

If dedicated processors are allocated for each command type, then command processing reliability is improved, but resource wastage and cost increase due to idle processors during low workload periods

Engineering Contradiction:
Improvecommand processing reliabilityVSAvoidresource wastage
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent merges the functionality of multiple dedicated processors into shared processing pools. Instead of having separate read processors, write processors, and erase processors that sit idle when not needed, the system combines these functions into unified processor pools that can be dynamically allocated. This consolidation maintains reliability by ensuring sufficient processing capacity is available for each command type when needed, while eliminating resource wastage from having dedicated processors idle during low-demand periods.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250044947A1Memory command assignment based on command processor workload
Publication Date: 2025.02.06 MICRON TECHNOLOGY INC
  • US20250044947A1 patent drawing
  • US20250044947A1 patent drawing
  • US20250044947A1 patent drawing

AI summary

Implementations described herein relate to memory command assignment based on command processor workload. In some implementations, a memory device may determine a first command type of a first memory command. The memory device may identify a first command processor, associated with the first command type, that is one of multiple command processors configured to execute memory commands. The first command processor may be configured to execute only commands having the first command type unless a computational credit condition, associated with another command processor, is satisfied. The memory device may determine that a cumulative computational credit value associated with the first command processor does not satisfy a condition. The memory device may assign the first memory command to the first command processor for execution based on determining that the cumulative computational credit value associated with the first command processor does not satisfy the condition.