Semiconductor Memory Common Source Line Floating
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Solution Overview
Problem
Semiconductor memory devices face high power consumption during read and verify operations, which affects efficiency and energy usage.
Innovation Solution
The semiconductor memory device includes a control logic that manages a read operation by floating a common source line during the bit line precharge and sensing operations, reducing power consumption by minimizing current flow through the common source line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the common source line is maintained at a fixed voltage during read operations, then the memory operation is stable and reliable, but the power consumption increases due to continuous current flow
Solution Approach 1:
The patent applies the dynamics principle by transitioning the common source line from a static fixed voltage state to a dynamic state where it alternates between floating and fixed voltage conditions. During bit line precharge operations, the common source line is floated (disconnected from fixed voltage), and during sensing operations, it is connected to a fixed voltage. This dynamic switching reduces power consumption during precharge while maintaining operation stability during sensing, thereby resolving the technical contradiction between power consumption and operation reliability.
2Use of energy by moving object
If the common source line is floated during the entire read operation period, then the power consumption is minimized, but the sensing operation cannot be performed correctly
Solution Approach 1:
The patent applies the segmentation principle by dividing the read operation into distinct phases (bit line precharge operation and sensing operation) and applying different common source line voltage conditions to each phase. During the bit line precharge operation, the common source line is floated to reduce power consumption. During the sensing operation, the common source line is connected to a fixed voltage to ensure sensing accuracy. This temporal segmentation allows the system to optimize for power consumption during precharge while maintaining sensing precision during the actual sensing phase, thereby resolving the contradiction between power minimization and sensing accuracy.
Data Source
AI summary
A semiconductor memory device includes a memory block, and control logic. The memory block includes a plurality of memory cells. The control logic controls a peripheral circuit to perform a read operation on selected memory cells among the plurality of memory cells. The read operation includes a bit line precharge operation, an evaluation operation, and a sensing operation. The control logic is configured to control the peripheral circuit to float a common source line coupled to the memory block during at least a partial period of a period of the bit line precharge operation, in which a voltage of a plurality of bit lines coupled to the memory block increases.