Non-volatile Memory Compression Engine Paired Pages

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Solution Overview

Problem

Existing non-volatile semiconductor memory systems face inefficiencies in data storage and retrieval due to limitations in single-level cell (SLC) and multi-level cell (M) technologies, particularly in terms of performance, endurance, and capacity, which are not optimally addressed by current memory management protocols.

Innovation Solution

The implementation of a compression engine within the memory device that dynamically switches between S-mode and M-mode storage based on data size, using paired pages to optimize storage efficiency by compressing write data and decompressing read data, thereby enhancing performance and endurance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If SLC mode is used for storage, then performance and endurance are improved, but capacity is reduced

Engineering Contradiction:
ImproveperformanceVSAvoidcapacity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The memory device divides its storage pages into paired groups, where each pair consists of two pages. This segmentation allows the system to selectively use SLC mode for one page and MLC mode for the other page in each pair, enabling a balance between performance (SLC characteristics) and capacity (MLC characteristics) at the page level rather than requiring the entire device to operate in a single mode.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If MLC mode is used for storage, then capacity is increased, but performance and endurance are reduced

Engineering Contradiction:
ImprovecapacityVSAvoidperformance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The system applies different storage modes to different local regions (pages) based on data characteristics. Specifically, highly compressible data is stored in SLC mode within paired pages to achieve high performance, while less compressible data is stored in MLC mode to maximize capacity utilization. This local quality approach allows each page to have the optimal storage mode for its specific data type.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If data is compressed before storage, then storage efficiency is improved, but access latency increases

Engineering Contradiction:
Improvestorage efficiencyVSAvoidaccess latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The compression engine performs data compression in advance during write operations, so that compressed data is already prepared and stored in SLC mode before read operations occur. This preliminary compression action eliminates the need for real-time compression during read operations, thereby minimizing access latency while maintaining high storage efficiency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8135903B1Non-volatile semiconductor memory compressing data to improve performance
Publication Date: 2012.03.13 WESTERN DIGITAL TECHNOLOGIES INC
  • US8135903B1 patent drawing
  • US8135903B1 patent drawing
  • US8135903B1 patent drawing

AI summary

A non-volatile semiconductor memory is disclosed comprising a plurality of paired pages, wherein each pair comprises a first page and a second page. A write command is received from a host comprising write data and a write address. The write address is mapped to a physical address of a selected one of the paired memory pages. The write data is compressed to generate compressed data, and when the compressed data fits in one of the pages of the selected pair, the compressed data is stored in the first page and in the second page of the selected pair in an S-mode.