Memory Controller Compression Sequences for Lower Decompression Delay

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Solution Overview

Problem

Existing memory systems experience delays due to data compression and decompression processes, which affect the efficiency and performance of data storage.

Innovation Solution

A memory system with a controller that compresses input data into sequences, including token bits and offset bits to indicate data portions, and performs parallel processing using multiple processors for compression and decompression operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is compressed to increase storage capacity, then storage efficiency is improved, but compression and decompression delays occur

Engineering Contradiction:
Improvestorage capacityVSAvoidcompression and decompression delays
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent segments compressed data into multiple sequences, where each sequence contains token bits indicating data portion lengths and offset bits indicating positions of repetitive data. This segmentation allows parallel processing of multiple sequences during decompression, reducing overall decompression delay while maintaining storage efficiency through compression.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If compression operations are performed to manage storage space efficiently, then storage efficiency is improved, but operational performance deteriorates due to compression delays

Engineering Contradiction:
Improvestorage efficiencyVSAvoidoperational performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent performs preliminary compression of data before storage, organizing it into sequences with embedded metadata (token bits and offset bits) that facilitate rapid decompression. This preliminary organization reduces the computational burden during operational performance-critical phases, balancing storage efficiency with operational speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs dynamic parallel processing during decompression, where multiple sequences are processed simultaneously by different processors. The system adapts the degree of parallelism based on the number of sequences and available processing resources, optimizing operational performance while maintaining compression efficiency.

Inventive Principle:
Principle #15Dynamics

3Productivity

If multiple processors are used for parallel processing, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidcontroller complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments data into multiple independent sequences that can be processed in parallel by multiple processors. Each sequence contains self-contained metadata (token bits for data portion lengths, offset bits for repetitive data positions), allowing processors to work independently without complex coordination, thus improving productivity while limiting complexity growth.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal sequence format that can be processed by any processor in the parallel array. The standardized structure with token bits and offset bits allows different processors to handle different sequences using the same processing logic, improving productivity through parallelism while avoiding the need for complex processor-specific control logic.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260056658A1Control device, memory device and memory system
Publication Date: 2026.02.26 SK HYNIX INC
  • US20260056658A1 patent drawing
  • US20260056658A1 patent drawing
  • US20260056658A1 patent drawing

AI summary

Data to be stored in a memory is compressed by units of a predetermined size, and compression format data is configured only with sequences, each including information on a non-repetitive portion and a repetitive portion in the data, and each of a compression operation and a decompression operation is processed in parallel. Therefore, the storage space of the memory may be efficiently used, and delays due to compression and decompression operations on the data to be stored in the memory may be reduced, whereby it is possible to improve the operational performance of the memory.