Solid State Memory Conductive Structure Periphery Contact

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Solution Overview

Problem

The conventional process for forming electrical connections in vertical memory arrays is complex and leads to manufacturing difficulties such as planarization, topography, and dishing issues, impacting yield and costs due to the need for bulk removal of conductive and insulative materials in the periphery regions.

Innovation Solution

A simplified process where conductive and insulative layers remain substantially intact in the periphery, with contacts extending through these layers to interconnects, reducing material removal and using insulative liners to isolate contacts from conductive layers, thereby minimizing manufacturing issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bulk removal of conductive and insulative materials is performed in the periphery to form electrical connections, then electrical connections with interconnects can be established, but manufacturing complexity increases and planarization/dishing issues occur

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive and insulative layers are extended into the periphery regions in advance, before the need to form electrical connections. This preliminary extension eliminates the requirement for bulk material removal later, as the layers are already positioned to facilitate direct contact with interconnects, thereby simplifying the manufacturing process while ensuring reliable electrical connections

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention extracts and removes the problematic bulk material removal step from the manufacturing process. By extending the layers into the periphery beforehand, the need to perform large-scale material removal and subsequent planarization is eliminated, keeping only the essential steps of forming contacts through the extended layers

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If bulk removal of conductive and insulative materials is performed in the periphery, then electrical connections can be formed, but manufacturing yield decreases due to planarization and dishing issues

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidmanufacturing yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The conductive and insulative layers are extended into the periphery regions in advance, before the need to form electrical connections. This preliminary extension eliminates the requirement for bulk material removal later, as the layers are already positioned to facilitate direct contact with interconnects, thereby simplifying the manufacturing process while ensuring reliable electrical connections

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention converts the potential harm of having excess material in the periphery into a benefit. Instead of viewing the extended layers as waste material requiring removal, the solution utilizes these extended layers directly to form the electrical connections, turning what would be a manufacturing burden into a functional advantage that improves yield

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Ease of operation

If conductive and insulative layers are removed in bulk from the periphery, then interconnect access is achieved, but manufacturing costs increase

Engineering Contradiction:
Improveinterconnect accessibilityVSAvoidmanufacturing cost
Core Design Contradiction:
Ease of operationVSEase of manufacture

Solution Approach 1:

The conductive and insulative layers are extended into the periphery regions in advance, before the need to form electrical connections. This preliminary extension eliminates the requirement for bulk material removal later, as the layers are already positioned to facilitate direct contact with interconnects, thereby simplifying the manufacturing process while ensuring reliable electrical connections

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10707121B2Solid state memory device, and manufacturing method thereof
Publication Date: 2020.07.07 INTEL NDTM US LLC
  • US10707121B2 patent drawing
  • US10707121B2 patent drawing
  • US10707121B2 patent drawing

AI summary

Conductive structure technology is disclosed. In one example, a conductive structure can include an interconnect and a plurality of conductive layers overlying the interconnect. Each conductive layer can be separated from an adjacent conductive layer by an insulative layer. In addition, the conductive structure can include a contact extending through the plurality of conductive layers to the interconnect. The contact can be electrically coupled to the interconnect and insulated from the plurality of conductive layers. Associated systems and methods are also disclosed.