Semiconductor Memory Contact Electrode Thickness Variation
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Solution Overview
Problem
The existing semiconductor memory devices face challenges in reducing manufacturing costs and maintaining structural integrity due to increased expansion stress from insulating layers, which can lead to distortion and increased complexity in forming through-holes and memory holes simultaneously.
Innovation Solution
The semiconductor memory device design incorporates a contact electrode structure with a thicker end portion and a supporting structure with adjusted diameters to reduce contact resistance and manufacturing costs, while also employing a manufacturing method that collectively forms contact holes and through-holes to minimize process complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If insulating layers are added to increase in number, then electrical insulation performance is improved, but expansion stress increases causing distortion
Solution Approach 1:
The contact electrode is designed with non-uniform thickness, having a first thickness in the contact region and a second thickness in the extension region, where the first thickness is greater than the second thickness. This local variation in thickness allows the contact electrode to provide sufficient mechanical support and stress distribution capability at the contact region while maintaining overall structural stability, thereby resolving the contradiction between electrical insulation performance and structural distortion.
2Manufacturing precision
If through-holes and memory holes are formed separately, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent combines the formation of through-holes and memory holes into a single manufacturing step, where both types of holes are formed simultaneously through one patterning and etching process. This merging approach reduces the number of manufacturing steps, lowers process complexity, and decreases manufacturing costs while maintaining adequate precision for both hole types through unified process control.
3Reliability
If contact electrode thickness is increased uniformly, then contact resistance is reduced, but manufacturing cost and process complexity increase
Solution Approach 1:
The contact electrode is designed with spatially varying thickness, having a greater first thickness in the contact region where low contact resistance is critical, and a smaller second thickness in the extension region where mechanical support is sufficient. This localized thickness variation achieves the required electrical performance at the contact interface while reducing overall material consumption and simplifying the manufacturing process compared to uniform thickness increase.
Data Source
AI summary
A semiconductor memory device includes a substrate, a semiconductor layer extending in a first direction, a first conductive layer extending in a second direction and opposed to the semiconductor layer, an electric charge accumulating layer disposed between the semiconductor layer and the first conductive layer, and a first contact electrode extending in the first direction and connected to the first conductive layer. The first contact electrode has one end in the first direction farther from the substrate than the first conductive layer, the other end in the first direction closer to the substrate than the first conductive layer. The first conductive layer includes a first part opposed to the semiconductor layer and a second part connected to the first contact electrode. The second part has a thickness in the first direction larger than a thickness in the first direction of the first part.