3D Memory Gate Stack Contact Insulation for Higher Integration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing complexity of manufacturing processes in three-dimensional semiconductor memory devices due to the stacking of multiple word lines complicates the integration density improvement.

Innovation Solution

A semiconductor memory device design featuring a substrate with a peripheral circuit, a gate stack structure, a channel structure, and insulating structures around contact plugs to simplify the manufacturing process, including a method of forming a preliminary structure, a stack structure, and channel and contact plugs to enhance integration density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of word lines stacked on top of each other is increased to improve integration density, then integration density is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The gate stack structure is divided into a cell array region and a stepped region. The stepped region allows selective formation of contact plugs only in specific areas, segmenting the manufacturing process to avoid the need for complex patterning across the entire stacked structure. This segmentation maintains high integration density while reducing manufacturing complexity by treating different regions differently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The insulating structure is formed locally around contact plugs only in the stepped region, not throughout the entire gate stack. This local quality approach applies insulation only where contact plugs are present, reducing unnecessary manufacturing steps and material usage while maintaining the high integration density achieved through word line stacking.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If multiple word lines are stacked to improve integration density, then integration density is improved, but the manufacturing process becomes more complicated

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The insulating structure is formed preliminarily around contact plugs before final device assembly. This preliminary action simplifies subsequent manufacturing steps by pre-establishing insulation, making the overall manufacturing process easier despite the complex stacked structure. The preliminary formation of insulating structures around contact plugs in the stepped region reduces the complexity of later processing steps.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12446224B2Semiconductor memory device and manufacturing method of the semiconductor memory device
Publication Date: 2025.10.14 SK HYNIX INC
  • US12446224B2 patent drawing
  • US12446224B2 patent drawing
  • US12446224B2 patent drawing

AI summary

A semiconductor memory device, and a method of manufacturing the semiconductor memory device, includes: a substrate including a peripheral circuit, a gate stack structure disposed over the substrate and including a cell array region and a stepped region that extends from the cell array region, a channel structure passing through the cell array region of the gate stack structure, a memory layer surrounding a sidewall of the channel structure, a first contact plug passing through the stepped region of the gate stack structure, and an insulating structure surrounding a sidewall of the first contact plug to insulate the first contact plug from the gate stack structure.