3D Memory Contact Plug Spacer Structure Against Electrical Bridging

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Solution Overview

Problem

The integration limit of semiconductor devices with single-layer memory cells on a substrate and the need for improved operational reliability in three-dimensional semiconductor devices.

Innovation Solution

A semiconductor device structure featuring a first contact plug with varying widths, surrounded by multiple spacers to maintain distance and prevent electrical bridges, and a manufacturing method involving sacrificial layers and spacer formations to ensure stable connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If single-layer memory cells are used on a substrate, then manufacturing process is simpler, but integration density reaches its limit

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidintegration density
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent transitions from two-dimensional single-layer memory cell arrangement to three-dimensional stacked memory cell structure. Multiple memory cell layers are vertically stacked on the substrate, enabling significant increase in integration density while maintaining manufacturing feasibility through adapted fabrication processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If three-dimensional stacked memory cells are implemented, then integration density improves, but manufacturing complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The manufacturing process is segmented into distinct stages: forming sacrificial layers, creating contact holes through specific openings, depositing spacer layers, and removing sacrificial materials. Each stage is independently controlled and optimized, making the complex three-dimensional fabrication process manageable and repeatable

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Sacrificial layers are formed in advance before contact holes are created. These preliminary sacrificial structures define the spatial configuration for subsequent contact hole formation and spacer deposition, enabling precise three-dimensional positioning without requiring complex real-time alignment processes

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If contact plugs are formed without spacers, then manufacturing process is simpler, but electrical bridges may occur reducing reliability

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidelectrical connection reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Spacer layers are introduced as intermediary structures between contact plugs and surrounding materials. These spacers provide electrical isolation and physical separation, preventing harmful electrical bridges while maintaining accurate contact plug alignment and connection reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If contact plug alignment is not precisely controlled, then manufacturing is easier, but device performance deteriorates due to misalignment

Engineering Contradiction:
Improvealignment control difficultyVSAvoidcontact plug alignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The spacer layers are formed through conformal deposition processes that automatically self-align to the contact hole structures. The spacers self-adjust to the contact plug positions and dimensions, eliminating the need for separate alignment steps and ensuring precise positioning without adding manufacturing complexity

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20260020310A1Semiconductor device and method for manufacturing the same
Publication Date: 2026.01.15 SK HYNIX INC
  • US20260020310A1 patent drawing
  • US20260020310A1 patent drawing
  • US20260020310A1 patent drawing

AI summary

A semiconductor device includes a first contact plug penetrating a source structure, the first contact plug having a first portion having a first width and a second portion having a second width that is larger than the first width, a stack formed on the source structure and the first contact plug, a second contact plug penetrating the stack, the second contact plug connected to the first contact plug, a first spacer surrounding the first portion and the second portion of the first contact plug, and a second spacer surrounding the first spacer to surround the second portion of the first contact plug.