Semiconductor Memory Contact Plug Void Prevention via Sacrificial Layers
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Solution Overview
Problem
The challenge in fabricating semiconductor memory devices lies in the difficulty of forming perfect ohmic layers due to imperfections in the formation of contact plugs, particularly the presence of voids and silicon nitride layers, which hinder the integration of semiconductor devices and increase fabrication costs.
Innovation Solution
A method involving the formation of spacers and sacrificial layers to prevent the formation of voids and ensure perfect ohmic contacts, including the use of sacrificial layers to block void entrances and protect the spacers during cleaning processes, thereby ensuring the formation of high-quality ohmic layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional exposure techniques are used for pattern formation, then fabrication cost is reduced, but manufacturing precision deteriorates due to inability to achieve fine patterns for high integration
Solution Approach 1:
The spacer formation process is divided into multiple stages: first spacer covering bit line sidewalls, second spacer covering bit line capping pattern sidewalls, and third spacer covering first spacer sidewalls. This segmentation allows each spacer to be formed and processed independently, achieving fine patterns without requiring advanced exposure techniques, thus maintaining fabrication cost effectiveness while improving pattern precision.
Solution Approach 2:
The bit line capping pattern is formed preliminarily before the spacer formation process. This preliminary structure serves as a foundation for subsequent spacer deposition, enabling precise pattern formation in advance and eliminating the need for expensive post-processing exposure techniques.
2Reliability
If contact plugs are formed with voids, then manufacturing simplicity is maintained, but reliability deteriorates due to imperfect ohmic layer formation
Solution Approach 1:
A sacrificial layer is introduced as an intermediary substance that fills the voids in contact plugs during spacer formation. This sacrificial layer prevents ohmic layer formation defects by blocking void entrances, ensuring reliable electrical contact. The sacrificial layer is subsequently removed, leaving a clean contact structure without requiring complex contact plug fabrication processes.
Solution Approach 2:
The sacrificial layer is deposited preliminarily to block void entrances in contact plugs before ohmic layer formation. This preliminary protective action prevents harmful void-related defects from occurring, ensuring reliable ohmic contact without requiring complex contact plug structures.
3Manufacturing precision
If spacers are formed to ensure precise alignment, then manufacturing precision is improved, but device complexity increases due to multiple spacer and sacrificial layer formations
Solution Approach 1:
Each spacer is formed to cover the sidewalls of previously formed structures, creating self-aligned configurations. The first spacer covers bit line sidewalls, the second spacer covers bit line capping pattern sidewalls, and the third spacer covers first spacer sidewalls. This self-service approach achieves precise alignment automatically through conformal deposition, eliminating the need for additional alignment steps and reducing overall process complexity despite multiple layers.
Data Source
AI summary
A method of fabricating a semiconductor memory device includes forming a bit line and a bit line capping pattern on the semiconductor substrate, forming a first spacer covering a sidewall of the bit line capping pattern and a sidewall of the bit line, forming a contact plug in contact with a sidewall of the first spacer and having a top surface that is lower than an upper end of the first spacer, removing an upper portion of the first spacer, forming a first sacrificial layer closing at least an entrance of the void, forming a second spacer covering the sidewall of the bit line capping pattern and having a bottom surface in contact with a top surface of the first spacer, and removing the first sacrificial layer. The bit line capping pattern is on the bit line. The contact plug includes a void exposed on the top surface.