Memory Contact Insulation Structure to Prevent Seam Shorting
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Solution Overview
Problem
Existing semiconductor memory devices face issues with short-circuiting of contacts due to the formation of seams during the manufacturing process, which can compromise the electrical integrity and functionality of the device.
Innovation Solution
The implementation of an insulating structure with multiple layers of different materials, such as silicon oxide and silicon nitride, to form an insulating portion that prevents the formation of seams and ensures that contacts do not penetrate into these seams, thereby maintaining electrical isolation and preventing short-circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single-layer insulating structure is used, then the manufacturing process is simpler, but contacts may penetrate into seams causing short-circuits
Solution Approach 1:
The insulating structure is divided into multiple layers (first insulating layer and second insulating layer) with different etching rates. This segmentation allows the first layer to protect against seam penetration while the second layer provides additional insulation, resolving the contradiction between manufacturing simplicity and electrical isolation reliability.
Solution Approach 2:
The patent uses composite insulating materials with different etching rates (e.g., silicon oxide and silicon nitride) stacked together. This composite structure prevents contact penetration into seams by controlling differential etching, thereby maintaining electrical isolation while remaining manufacturable through standard semiconductor processes.
2Reliability
If multiple insulating layers with different materials are used, then contact penetration into seams is prevented, but the manufacturing process becomes more complex
Solution Approach 1:
Different insulating layers are applied locally at specific positions where seam penetration risk exists. The first insulating layer with lower etching rate is positioned at the interface prone to seam formation, providing targeted protection without requiring complete restructuring of the entire device, thus limiting complexity increase.
Solution Approach 2:
The first insulating layer is formed preliminarily before contact formation, creating a protective barrier in advance. This preliminary action prevents seam penetration during subsequent processing steps, ensuring reliability while allowing the use of standard sequential fabrication processes.
3Ease of manufacture
If etching rate control is not implemented, then manufacturing is easier, but seams form and cause contact short-circuits
Solution Approach 1:
The patent changes the etching rate parameter by selecting materials with different etching characteristics (e.g., silicon oxide with lower etching rate and silicon nitride with higher etching rate). This parameter change allows the first layer to resist seam penetration during etching while the second layer can be etched away more easily, achieving precision control without excessive manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents short-circuiting between adjacent contacts, ensuring reliable electrical performance and simplifying the manufacturing process by controlling etching rates to avoid penetration into seams, thus maintaining consistent electric characteristics.
Implementation Method 1
a gate insulating layer disposed between the semiconductor layer and the plurality of conductive layers
Implementation Method 2
The insulating portion includes a first insulating layer and a second insulating layer stacked in this order from the semiconductor layer side. The insulating portion has a lower etching rate than the bit line insulating layer
Data Source
AI summary
A semiconductor memory device includes: a plurality of first conductive layers disposed in a first direction; a structure that includes a first semiconductor layer extending in the first direction and being opposed to the plurality of first conductive layers, a gate insulating layer being disposed between the first semiconductor layer and the plurality of first conductive layers, and a second semiconductor layer being contact to one end portion of the first semiconductor layer; a contact connected to the second semiconductor layer; an insulating portion that separates a part of the plurality of first conductive layers in a second direction and is in contact with the structure and the contact from one side in the second direction; and a first insulating layer in contact with the contact from the other side in the second direction. The insulating portion includes an insulating material different from a material of the first insulating layer.