Memory Contact Structure for Low-Resistance Source/Drain Access
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Solution Overview
Problem
The reduction in feature size of memory devices decreases the contact area between electronic components, leading to increased electric resistance and potential functional issues in memory devices.
Innovation Solution
A memory structure design featuring a contact with multiple portions extending into different dielectric layers, optimizing the contact area by adjusting the positions and widths of these portions to increase the contact with the source/drain region, thereby reducing electric resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the feature size is reduced to increase integration density, then more components can be integrated into a given area, but the contact area between electronic components decreases
Solution Approach 1:
The contact structure extends in multiple vertical dimensions by penetrating through multiple dielectric layers (first dielectric layer, second dielectric layer, and third dielectric layer) to reach the source/drain region. This multi-layer penetration approach increases the contact area in the vertical dimension, compensating for the reduced horizontal contact area due to feature size reduction.
Solution Approach 2:
The contact structure is nested within multiple dielectric layers, with each layer containing the contact portion. The contact portions are positioned within the first dielectric layer, second dielectric layer, and third dielectric layer in a nested configuration, allowing the contact to extend through the stacked layers and increase the effective contact area with the source/drain region.
2Reliability
If the contact area is increased to improve electrical connection, then the electric resistance decreases, but the device complexity increases
Solution Approach 1:
The contact structure is segmented into multiple distinct portions, each located within a specific dielectric layer. The first contact portion is in the first dielectric layer, the second contact portion is in the second dielectric layer, and the third contact portion is in the third dielectric layer. This segmentation allows each contact portion to contribute to the overall contact area with the source/drain region, increasing electrical connection reliability while maintaining a structured and manageable design.
Data Source
AI summary
A memory structure of the present disclosure includes a source/drain region on a substrate, a first dielectric layer covering the source/drain region, a second dielectric layer on the first dielectric layer, and a contact contacting the source/drain region. The contact includes a first contact portion extending into the source/drain region, a second contact portion extending into the first dielectric layer, and a third contact portion extending into the second dielectric layer. A bottom surface of the first contact portion is lower than a top surface of the source/drain region. The second contact portion is between the first contact portion and the third contact portion. A distance between a sidewall of the first contact portion and a sidewall of the source/drain region is 30% to 60% of a width of the source/drain region.


