Semiconductor Memory Contact Part Area Reduction
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Solution Overview
Problem
In semiconductor memory devices with a three-dimensional multilayer nonvolatile memory, the existing contact part configuration results in an unnecessarily large area due to only the descending staircase part being electrically connected to memory cells, while the ascending staircase part is not, leading to inefficient use of space.
Innovation Solution
The semiconductor memory device incorporates a contact part with both descending and ascending staircase structures, where the ascending step groups are electrically connected through a connection part, allowing contacts to be arranged on previously unused areas, thereby reducing the overall contact part area by enabling electrical connection between the ascending step groups and memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If only the descending staircase part is electrically connected to memory cells, then the structure is simple, but the contact part area becomes unnecessarily large
Solution Approach 1:
The ascending staircase part, which was previously non-functional, is now made electrically connected to memory cells through connection parts. This allows both the ascending and descending staircase parts to serve the same function of electrical connection, enabling contacts to be arranged on both sides and effectively doubling the utility of the staircase structure for contact arrangement.
Solution Approach 2:
The invention extends the electrical connection in the vertical dimension by adding connection parts that connect the ascending staircase part to memory cells. This dimensional extension allows contacts to be arranged not only on the descending staircase but also on the ascending staircase, optimizing the use of vertical space for contact arrangement.
2Ease of manufacture
If the ascending staircase part is not electrically connected, then manufacturing is simpler, but space utilization is inefficient
Solution Approach 1:
The ascending staircase part is transformed from a non-functional structure to a functional contact arrangement area by adding electrical connection capability. This allows the same staircase structure to serve dual purposes: maintaining structural integrity and providing additional contact arrangement space.
Solution Approach 2:
Connection parts are formed in advance to establish electrical connection between the ascending staircase part and memory cells before final contact formation. This preliminary action enables the ascending staircase to be utilized for contact arrangement without complicating the overall manufacturing process.
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes conductive layers stacked at intervals and extending from a memory cell array region to a contact region. The contact region includes a staircase contact region and a staircase connection region. The staircase contact region includes a descending step contact region with steps descending in a first direction away from the memory cell array region and an ascending step contact region with steps ascending in the first direction, and the descending step contact region and the ascending step contact region include terrace faces provided with respective contacts connected thereto. The staircase connection region includes conductive layers formed of layers same as conductive layers connected to the contacts of the ascending step contact region.