3D Memory Contact Layer Warping Mitigation

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Solution Overview

Problem

The integration of three-dimensional semiconductor memory devices faces challenges due to warping caused by thermal expansion coefficient differences between silicon substrates and metal layers like tungsten, leading to tensile stress and increased contact resistance.

Innovation Solution

Incorporating a silicon-based layer with a material having a similar thermal expansion coefficient to the substrate, in conjunction with a metal layer and a barrier layer, to reduce tensile stress and lower contact resistance while maintaining low wiring resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a metal layer (tungsten) is used to maintain low wiring resistance, then electrical conductivity is improved, but thermal expansion coefficient differences cause warping and increased contact resistance

Engineering Contradiction:

Improveelectrical conductivityVSAvoidwarping

Core Design Contradiction:

ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent employs a composite contact structure consisting of a first contact layer (tungsten metal) and a second contact layer (silicon-based material). This composite structure combines the low electrical resistance of metal with the thermal expansion compatibility of silicon-based materials, resolving the contradiction between electrical conductivity and warping prevention.

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

The silicon-based second contact layer acts as an intermediary between the metal first contact layer and the semiconductor substrate. This intermediate layer buffers the thermal expansion coefficient difference, preventing direct stress transmission that causes warping, while still allowing electrical conduction.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses warping and reduces contact resistance, enhancing the reliability and performance of three-dimensional semiconductor memory devices by mitigating thermal stress and improving electrical conductivity.

Implementation Method 1

warping caused by thermal expansion coefficient differences between silicon substrates and metal layers like tungsten

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS9812398B2Semiconductor memory device having memory cells provided in a height direction

Publication Date: 2017.11.07 KIOXIA CORP

AI summary

According to an embodiment, a semiconductor memory device comprises: a memory string comprising a plurality of memory cells connected in series therein; and a contact electrically connected to one end of the memory string. The memory string comprises a plurality of control gate electrodes, and a semiconductor layer. The contact comprises a contact layer, the contact layer having a plate-like shape whose longer direction is a first direction parallel to the substrate, and the contact layer having its lower surface electrically connected to the one end of the semiconductor layer. Moreover, the contact layer includes a metal layer, a silicon based layer, and a second conductive layer. The metal layer includes tungsten. The silicon based layer includes a material including silicon. The second conductive layer covers side surfaces of the metal layer and the silicon based layer.