High-Aspect-Ratio Memory Contacts With Dielectric-Lined Staircases

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Solution Overview

Problem

Conventional memory devices with high-aspect-ratio vertical conductive structures face challenges in forming reliable contacts, as they can degrade or damage other structures within the device, leading to unreliable or defective devices.

Innovation Solution

The use of a combination of dielectric structures and dielectric liners during the formation of conductive contacts at staircase structures in memory devices, which helps mitigate these issues by providing improved contact formation and reducing the impact on other device components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-aspect-ratio vertical conductive structures are formed in conventional memory devices, then electrical contact to control gates is achieved, but other vertical conductive structures or structures in the memory device are degraded or damaged

Engineering Contradiction:
Improvecontact reliabilityVSAvoiddamage to adjacent structures
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A dielectric liner is introduced as an intermediary layer between the conductive contact and the staircase structure. This liner prevents direct contact and potential damage to the control gates while still allowing the conductive contact to function. The dielectric liner acts as a protective mediator that enables the high-aspect-ratio contact to be formed without harming adjacent structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric liner is formed beforehand on the staircase structure before the conductive contact is deposited. This pre-formed protective layer cushions the staircase structure against potential damage during the contact formation process, preventing degradation of the control gates before the harmful interaction can occur.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Ease of manufacture

If high-aspect-ratio vertical conductive structures are formed, then conductive paths to control gates are established, but device reliability decreases due to structure degradation

Engineering Contradiction:
Improvecontact formationVSAvoiddevice reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The dielectric liner serves as a protective intermediary that enables the formation of high-aspect-ratio contacts while preventing damage to adjacent structures. This intermediary layer allows manufacturers to achieve the desired conductive paths without sacrificing device reliability, as it prevents the degradation that would otherwise occur during contact formation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If dielectric liner and dielectric structure are used during conductive contact formation, then damage to adjacent control gates is prevented, but manufacturing process complexity increases

Engineering Contradiction:
Improvecontact reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dielectric structure is segmented into multiple components: a dielectric liner layer formed on the staircase structure, and a dielectric structure layer formed over the liner. This segmentation allows each layer to serve a specific protective function, with the liner providing direct protection to the control gates and the dielectric structure providing additional protection and structural support. The segmented approach enables reliable contact formation while organizing the manufacturing process into distinct, manageable steps.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20230395512A1Memory device including high-aspect-ratio conductive contacts
Publication Date: 2023.12.07 MICRON TECHNOLOGY INC
  • US20230395512A1 patent drawing
  • US20230395512A1 patent drawing
  • US20230395512A1 patent drawing

AI summary

Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes memory cells located on tiers; control gates for the memory cells and located on respective tiers; a dielectric structure over the control gates; a first conductive contact formed in the dielectric structure and contacting a first control gate, the first conductive contact having a first length; and a second conductive contact formed in the dielectric structure and contacting the second control gate, the second conductive contact having a second length unequal to the first length, wherein the second conductive contact includes a first portion and a second portion, the second portion is between the first portion and the second control gate, the first portion including a first region having a first width, the second portion including a second region having a second width, and the second width being greater than the first width.