Memory Control Circuit Unit Command Sequencing for Multi-Core Access

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Solution Overview

Problem

In multi-core memory control systems, redundant activation commands are sent to memory modules before each access, leading to decreased access performance due to unnecessary activation procedures.

Innovation Solution

A memory control method that generates an operation command to access a specific memory group and sends a command sequence based on the activation state of the memory group, omitting the control command sequence for activation when the group is already activated.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If each central processing unit sends a specific operation command to activate the memory module before each access, then the memory module can be properly activated for access, but redundant activation commands are sent causing access performance to decrease

Engineering Contradiction:
Improvememory module activation reliabilityVSAvoidaccess performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by having central processing units send specific operation commands in advance to activate memory modules before actual data access operations. This ensures that memory modules are pre-configured and ready for subsequent access operations, improving overall access performance by eliminating the need to send activation commands during each access cycle

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where central processing units track and share information about which memory modules have been activated and accessed. This feedback system allows CPU cores to avoid sending redundant activation commands for already-activated memory modules, thereby resolving the contradiction between ensuring proper activation and maintaining high access performance

Inventive Principle:
Principle #23Feedback

2Reliability

If redundant activation commands are sent to ensure memory module activation, then activation reliability is maintained, but unnecessary activation procedures increase access time

Engineering Contradiction:
Improveactivation reliabilityVSAvoidaccess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the activation command sending operation from every access cycle and separates it based on actual need. By using feedback information about memory module activation states, the system only sends activation commands when necessary, removing the redundant activation procedures that were previously executed with every memory access attempt

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by sending activation commands selectively rather than universally for every memory access. The system performs the activation procedure only partially (when needed) based on feedback about current memory module states, avoiding the excessive action of sending activation commands for already-activated modules

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12292825B2Memory control method, memory storage device and memory control circuit unit
Publication Date: 2025.05.06 PHISON ELECTRONICS
  • US12292825B2 patent drawing
  • US12292825B2 patent drawing
  • US12292825B2 patent drawing

AI summary

A memory control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: generating a first operation command via one of a plurality of processing circuits, wherein the first operation command instructs to access a first memory group in a plurality of memory groups; and in response to a first state information, sending a first command sequence to the first memory group according to the first operation command to instruct the first memory group to perform an access operation. The first state information reflects a first activation state of the plurality of memory groups, and the first command sequence does not include a control command sequence configured to activate the first memory group.