Memory Control Circuit Unit Parallel Data Distribution
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Solution Overview
Problem
Existing data writing methods for rewritable non-volatile memory modules require significant buffer memory space when writing data to multiple sub-modules in parallel, which limits the efficiency of data storage and retrieval.
Innovation Solution
A data writing method that temporarily stores data in a buffer memory of reduced size and distributes it across different physical erasing units within distinct memory sub-modules, allowing for parallel data reading while minimizing buffer memory requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple memory sub-modules are simultaneously written with parallel data storage, then data writing speed and parallel reading capability are improved, but buffer memory space requirement increases significantly
Solution Approach 1:
The patent segments the data writing process into distinct phases: first writing data to a first memory sub-module, then sequentially copying to second and third sub-modules. This segmentation allows the buffer to be discharged incrementally rather than requiring simultaneous storage for all target modules, reducing peak buffer space requirements while maintaining parallel reading capability through the copy-back mechanism
Solution Approach 2:
The patent performs preliminary writing of data to the first memory sub-module before copying to other sub-modules. This preliminary action establishes a source copy that can be sequentially distributed to multiple destinations, allowing the buffer to be freed and reused during the copying process rather than maintaining separate buffer allocations for each target module
Data Source
AI summary
A data writing method, a memory control circuit unit, and a memory storage device are provided. The method includes: writing a first data and a second data to a first physical erasing unit; copying the first data from the first physical erasing unit to a second physical erasing unit; and copying the second data from the first physical erasing unit to a third physical erasing unit, wherein the memory sub-module to which the second physical erasing unit belongs is different from the memory sub-module to which the third physical erasing unit belongs.