Memory Control Circuit Unit Adjusts Read Voltage Offsets for Neighboring Cell Interference

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Solution Overview

Problem

The increasing density of memory cells in portable electronic devices leads to significant electrical interference, compromising the stability of data reading from these cells.

Innovation Solution

A data reading method that involves obtaining state information of neighboring memory cells, determining an electrical parameter offset value based on this information, and adjusting the read command sequence to reduce electrical interference by controlling electrical parameters such as read voltage levels and pass gate voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the distance between memory cells is reduced to decrease module volume, then the volume of the rewritable non-volatile memory module is reduced, but electrical interference between memory cells increases

Engineering Contradiction:
Improvevolume of memory moduleVSAvoidelectrical interference between memory cells
Core Design Contradiction:
Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

The patent adjusts reading voltage levels and timing parameters dynamically based on the state of neighboring memory cells. By changing electrical parameters (voltage offsets, read timing) according to the programming state of adjacent cells, the system compensates for interference effects while maintaining reduced cell spacing for compact form factor.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system obtains state information of neighboring memory cells and uses this feedback to determine appropriate electrical parameter offsets for reading operations. This closed-loop approach allows the reading process to adapt to the actual interference conditions created by adjacent cell states, improving read accuracy despite reduced cell pitch.

Inventive Principle:
Principle #23Feedback

2Volume of moving object

If the distance between memory cells is reduced to decrease module volume, then the volume of the rewritable non-volatile memory module is reduced, but the stability of reading data from memory cells deteriorates

Engineering Contradiction:
Improvevolume of memory moduleVSAvoidstability of reading data
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent dynamically adjusts reading voltage levels and timing parameters based on the state of neighboring memory cells. By changing electrical parameters (voltage offsets, read timing) according to the programming state of adjacent cells, the system compensates for interference effects while maintaining reduced cell spacing for compact form factor.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system obtains state information of neighboring memory cells and uses this feedback to determine appropriate electrical parameter offsets for reading operations. This closed-loop approach allows the reading process to adapt to the actual interference conditions created by adjacent cell states, improving read accuracy despite reduced cell pitch.

Inventive Principle:
Principle #23Feedback

3Reliability

If electrical parameter offset values are determined based on neighboring memory cell states to reduce electrical interference, then the stability of reading data is improved, but the complexity of the reading process increases

Engineering Contradiction:
Improvestability of reading dataVSAvoidcomplexity of reading process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system obtains the state information of neighboring memory cells before performing the actual read operation. By determining the electrical parameter offsets in advance based on the programming states of adjacent cells, the system prepares the optimal reading conditions beforehand, simplifying the execution phase while maintaining high read stability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12124743B2Data reading method, memory storage device, and memory control circuit unit
Publication Date: 2024.10.22 PHISON ELECTRONICS
  • US12124743B2 patent drawing
  • US12124743B2 patent drawing
  • US12124743B2 patent drawing

AI summary

A data reading method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: receiving a read command from a host system, and the read command instructs reading data from at least one logical unit, and the logical unit is mapped to a first physical unit; obtaining state information of at least two neighboring memory cells in the first physical unit; determining an electrical parameter offset value corresponding to the neighboring memory cells according to the state information; and sending a read command sequence according to the electrical parameter offset value, and the read command sequence instructs reading the first physical unit based on at least one electrical parameter, and the electrical parameter is controlled by the electrical parameter offset value.