Memory Control Circuit Stabilizes Data Access Speed
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Solution Overview
Problem
Data access speed in storage devices becomes unstable due to internal operations, leading to performance evaluation issues for host systems, especially during continuous data access operations.
Innovation Solution
A data transmission method that buffers completion messages and transmits them only when a predetermined waiting time value is met, stabilizing the data access speed detected by the host system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the storage device prioritizes the highest access speed to support data access operations, then the data access speed is improved, but the data access speed becomes unstable due to internal operations such as moving data
Solution Approach 1:
The patent applies preliminary action by pre-calculating and pre-transmitting completion messages during periods when the storage device is not performing internal operations. The host system receives completion messages in advance, allowing it to evaluate data access speed based on a stable average rather than fluctuating instantaneous values. This resolves the contradiction by maintaining high access speed while stabilizing the perceived speed through advance preparation of performance data.
2Adaptability or versatility
If the storage device performs internal operations such as moving data, then the storage device can maintain operational flexibility, but the data access speed decreases and becomes unstable
Solution Approach 1:
The patent introduces an intermediary mechanism in the form of a completion message transmission system that decouples the storage device's internal operations from the host system's speed perception. The host system evaluates speed based on completion message timing rather than direct observation of data transfer rates during internal operations. This intermediary allows the storage device to perform necessary internal operations while maintaining stable speed evaluation for the host system.
Data Source
AI summary
A data transmission method, a memory storage device and a memory control circuit unit are provided. The method includes: obtaining a first command from a host system and counting a first time value; performing a first access operation corresponding to the first command on the rewritable non-volatile memory module; and generating a first completion message corresponding to completion of the first access operation and buffering the first completion message in a buffer area; and transmitting the first completion message buffered in the buffer area to the host system if the first time value meets a first waiting time value. Accordingly, a data access speed detected by the host system is stabilized.