Non-volatile Memory Control Circuit Targeted Erasure
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Solution Overview
Problem
Flash memory experiences data retrieval issues due to 'program disturb' caused by high voltage application, leading to the need for sector-level erasure, which is inefficient and reduces memory lifespan, especially in high-frequency rewrite devices like cellular telephones.
Innovation Solution
A non-volatile memory control circuit that allows erasure to be performed on word line units rather than sector units, with data from unaffected cells saved and restored, and voltage deterioration checked to determine necessary erasure scope, enabling targeted and reduced erasure operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sector-level erasure is performed to prevent program disturb, then data retrieval reliability is improved, but memory lifespan is reduced due to increased erasure operations
Solution Approach 1:
The patent divides the sector into smaller word line units for erasure operations. Instead of erasing the entire sector when only partial data needs erasure, the system segments the erasure operation to affect only the specific word line containing the target memory cells, thereby reducing unnecessary erasures and extending memory lifespan while maintaining data reliability.
Solution Approach 2:
The patent applies different erasure treatments to different regions within the sector based on local needs. By identifying the specific word line and memory cells requiring erasure, the system applies erasure locally to only those affected areas rather than uniformly across the entire sector, thus preventing program disturb in targeted regions while preserving other regions from unnecessary degradation.
2Reliability
If sector-level erasure is performed, then program disturb is prevented, but data exchange volume increases
Solution Approach 1:
The patent segments the data exchange operation to only include the specific word line data that requires erasure, rather than exchanging all sector data. This reduces the volume of data that must be read, stored temporarily, and rewritten after erasure, thereby minimizing data exchange overhead while still preventing program disturb in the targeted area.
3Productivity
If word line unit erasure is implemented, then erasure efficiency is improved, but device complexity increases
Solution Approach 1:
The patent implements preliminary identification of the word line containing memory cells to be erased before the actual erasure operation. By pre-determining the specific word line unit that requires erasure based on the memory cell addresses, the control circuit can efficiently direct the erasure operation to the correct region without requiring complex real-time decision-making during erasure, thus balancing improved efficiency with manageable device complexity.
Data Source
AI summary
An efficient erasure is performed. The voltage of a source line SL is manipulated in units of a sector providing a plurality of memory cells. An erase command is received for the desired memory cells to be erased in a plurality of word line WL units arranged within a sector and all data within the sector, which includes the desired memory cells to be erased, is saved in a separate memory. Erasure is then performed for the entire sector, and among the saved data the data outside the desired memory cells to be erased is returned to the memory cells.