Memory Control Circuit Unit Managing Physical Erasing Units

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Solution Overview

Problem

The data writing speed in rewritable non-volatile memory modules is often insufficient, leading to data loss due to temporary storage in cache memory before being written, especially when dealing with videos or images, as the existing technologies fail to efficiently manage the usage frequency of physical erasing units, resulting in prolonged waiting times and incomplete data storage.

Innovation Solution

A data writing method that identifies the usage frequency of physical erasing units and performs a data arrangement operation by copying data from less frequently used units to more idle units, allowing for simultaneous execution of command information in a pipeline manner to reduce writing time and prevent data loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is temporarily stored in cache memory before being written into the rewritable non-volatile memory module, then data loss is prevented, but data writing speed becomes overly slow

Engineering Contradiction:
Improvedata reliabilityVSAvoiddata writing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The system proactively identifies physical erasing units with low usage frequencies in advance and performs data arrangement operations before cache memory becomes full. By counting usage frequencies and selecting target units beforehand, the system prepares storage resources in advance, enabling faster data writing without compromising reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory control circuit unit autonomously manages the data arrangement operation by automatically identifying low-usage physical erasing units, selecting target units, and executing data copying without external intervention. This self-service mechanism continuously optimizes storage resource allocation, maintaining both high writing speed and data reliability.

Inventive Principle:
Principle #25Self-service

2Speed

If data arrangement operation is performed to copy data from low usage frequency units to idle units, then writing speed is improved, but device complexity increases

Engineering Contradiction:
Improvedata writing speedVSAvoidcontrol circuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system implements a feedback mechanism by continuously counting and monitoring usage frequencies of physical erasing units. This feedback information guides the selection of target units for data arrangement operations, enabling intelligent and adaptive management of storage resources without requiring complex external control logic.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The memory control circuit unit autonomously performs the entire data arrangement process including usage frequency counting, target unit selection, and data copying. This self-service capability simplifies the overall system architecture by integrating all necessary functions into a single control unit, reducing external complexity while maintaining high writing speed.

Inventive Principle:
Principle #25Self-service

3Loss of time

If the number of physical erasing units is increased to reduce waiting time, then data writing speed is improved, but loss of substance increases

Engineering Contradiction:
Improvewaiting timeVSAvoidmemory capacity waste
Core Design Contradiction:
Loss of timeVSLoss of substance

Solution Approach 1:

The system dynamically changes the operational status of physical erasing units by tracking usage frequencies and transitioning units between active and idle states based on their utilization patterns. This parameter-based management allows the system to reduce waiting time by efficiently activating idle units without permanently increasing total memory capacity, thus avoiding substance loss.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system employs dynamic resource allocation where physical erasing units can transition between different operational states (active, idle, low-usage) based on real-time usage frequencies. This dynamic approach allows the same physical memory capacity to serve multiple purposes over time, reducing waiting time without requiring additional memory substance.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9965194B2Data writing method, memory control circuit unit and memory storage apparatus which performs data arrangement operation according to usage frequency of physical erasing unit of memory storage apparatus
Publication Date: 2018.05.08 PHISON ELECTRONICS
  • US9965194B2 patent drawing
  • US9965194B2 patent drawing
  • US9965194B2 patent drawing

AI summary

A data writing method, a memory control circuit unit and a memory storage apparatus are provided. The method includes: receiving a first write command and first data corresponding to the first write command, and writing the first data into a third physical erasing unit in first physical erasing units; and if a usage frequency of a fourth physical erasing unit in the first physical erasing units is less than a predetermined value, performing a data arrangement operation corresponding to the first write command to copy second data stored by the fourth physical to at least one of second physical erasing units.