Memory Control Compression Layout for Semiconductor Data Processing

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Solution Overview

Problem

Semiconductor devices face inefficiencies in compression and decompression processes due to varying output characteristics from computing units and the need for common data structures, leading to decreased compression efficiency and increased circuit area.

Innovation Solution

Incorporating a computing module with a compression section and a memory control module with an access and decompression section, where data is buffered and converted into a suitable structure for compression before being compressed, and decompressed data is handled by the memory control module, allowing for unit-specific compression and reducing the need for decompression circuits in all computing units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If compression circuits are incorporated into all computing units to enable unit-specific compression, then compression efficiency is improved, but circuit area increases

Engineering Contradiction:
Improvecompression efficiencyVSAvoidcircuit area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent merges the compression function into a shared resource within the memory control module that serves multiple computing units. Instead of each computing unit having its own compression circuit, the memory control module incorporates a compression circuit that can handle compression requests from any computing unit, thereby improving compression efficiency while avoiding the circuit area increase that would result from duplicating compression circuits in every computing unit.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If decompression circuits are incorporated into all computing units to handle compressed data, then data processing flexibility is improved, but circuit area increases

Engineering Contradiction:
Improvedata processing flexibilityVSAvoidcircuit area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the decompression function into the memory control module, where a single decompression circuit handles decompression requests from multiple computing units. This approach maintains data processing flexibility by allowing any computing unit to receive decompressed data while avoiding the circuit area increase that would result from placing decompression circuits in every computing unit.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory control module acts as an intermediary between the memory and computing units, handling both compression and decompression operations. This intermediary role allows the system to maintain flexibility in data processing while centralizing the compression and decompression functionality, thereby avoiding the need for each computing unit to have its own compression and decompression circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If a common data structure is used for compression across all computing units, then system simplicity is improved, but compression efficiency decreases

Engineering Contradiction:
Improvesystem simplicityVSAvoidcompression efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements a dynamic approach where the memory control module can adapt its compression and decompression operations based on the specific data characteristics and requirements of different computing units. The system maintains simplicity through a unified memory control interface while achieving high compression efficiency by allowing the compression circuit to optimize its operations based on the actual data being processed, rather than being constrained by a rigid common data structure.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10459646B2Semiconductor device, data processing system, and semiconductor device control method
Publication Date: 2019.10.29 RENESAS ELECTRONICS CORP
  • US10459646B2 patent drawing
  • US10459646B2 patent drawing
  • US10459646B2 patent drawing

AI summary

Disclosed is a semiconductor device capable of performing compression and decompression with increased appropriateness. The semiconductor device includes a computing module and a memory control module. The computing module includes a computing unit and a compression circuit. The computing unit performs arithmetic processing. The compression circuit compresses data indicative of the result of arithmetic processing. The memory control module includes an access circuit and a decompression circuit. The access circuit writes compressed data into a memory and reads written data from the memory. The decompression circuit decompresses data read from the memory and outputs the decompressed data to the computing module.