Memory Control Device Compression Rate Storage ECC Reliability
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Solution Overview
Problem
Existing memory control methods that compress data for external memory to increase memory bandwidth face issues such as increased memory access latency due to unnecessary ECC reads and the requirement for extra hardware resources to store compression rates, which compromises data reliability and efficiency.
Innovation Solution
A memory control method that stores error correcting codes and compression information in an additional data area within the memory, allowing for efficient readout of compressed data based on the compression degree, thereby eliminating unnecessary memory accesses and reducing hardware resource requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the memory compression rate is stored in the ECC bit field, then the memory bandwidth is increased, but data reliability deteriorates because ECC cannot perform error correction and detection
Solution Approach 1:
The patent segments the additional data area into distinct functional fields: compression rate information is stored in one portion while ECC bits are allocated in another portion. This segmentation allows the compression rate to be stored without interfering with ECC functionality, thus maintaining both memory bandwidth improvement and data reliability.
Solution Approach 2:
The patent extracts the compression rate information from the ECC bit field and places it in a separate additional data area. This extraction resolves the conflict by allowing compression rate storage while preserving ECC's error correction capability, as the two functions no longer share the same storage space.
2Productivity
If the ECC is read before reading data, then the memory compression rate can be determined, but memory access latency increases due to unnecessary memory access
Solution Approach 1:
The patent merges the storage of compression rate information with the data itself by placing both in the same memory location within the additional data area. This merging eliminates the need for separate ECC reads, as the compression rate is now directly accessible with the data read operation, reducing memory access latency.
Solution Approach 2:
The additional data area serves multiple functions simultaneously: it stores both the compression rate information and the ECC bits. This self-service approach allows the same memory structure to provide both compression management and error correction without requiring additional separate access operations.
3Productivity
If the memory compression rate is held in the processor, then the memory access can be controlled, but extra hardware resources are required
Solution Approach 1:
The patent implements self-service by storing the compression rate information directly in the additional data area of the memory structure itself. This eliminates the need for external hardware resources in the processor to hold compression rates, as the memory structure provides this information autonomously during read operations.
Solution Approach 2:
The additional data area is designed with multi-functionality, serving both as storage for compression rate information and as storage for ECC bits. This universal structure eliminates the need for separate hardware resources while maintaining the ability to control memory access based on compression rates.
Data Source
AI summary
A memory control device 100 of the present invention includes a data storage processing unit 101 that stores, in an additional data area that is an area for storing additional data in memory-stored data including compressed data and the additional data to be stored in a memory, an error correcting code of the compressed data and compression information representing the degree of compression of the compressed data, and a read processing unit 102 that controls readout of the memory-stored data on the basis of the degree of compression represented by the compression information in the additional data area of the memory-stored data, when reading out the memory-stored data from the memory.