Memory Control Device Deep Power-Down Mode Circuit Architecture

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Current memory systems face challenges in reducing power consumption during the deep power-down mode while ensuring effective and correct exit from this mode to enter standby mode, especially as manufacturing processes miniaturize and increase the number of components.

Innovation Solution

A control device with a first and second peripheral circuit group, where the second peripheral circuit group includes an input/output buffer and an exit command string decoder, allows for the deep power-down signal to transition logic values to control the entry and exit from deep power-down mode, reducing power consumption and enabling correct mode transitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If more components of the control device are disabled to reduce power consumption in deep power-down mode, then power consumption is reduced, but the ability to correctly exit deep power-down mode deteriorates

Engineering Contradiction:

Improvepower consumption of deep power-down modeVSAvoidability to exit deep power-down mode

Core Design Contradiction:

Loss of energyVSReliability

Solution Approach 1:

The control device is divided into two peripheral circuit groups with different power management strategies. The first group is fully powered in standby mode, while the second group is partially powered down in deep power-down mode, allowing selective disabling of components while maintaining essential exit functionality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The exit command string decoder is designed to remain operational or be rapidly activatable during deep power-down mode, enabling the system to respond to exit commands without requiring full power restoration first. This preliminary maintenance of exit capability ensures reliable mode transition.

Inventive Principle:

Principle #10Preliminary action

2Adaptability or versatility

If the miniature process is used to increase the number of components, then functionality is improved, but power consumption in deep power-down mode increases

Engineering Contradiction:

Improvenumber of componentsVSAvoidpower consumption of deep power-down mode

Core Design Contradiction:

Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The control device components are segmented into two groups based on their power consumption characteristics and functional requirements. This segmentation allows the system to benefit from increased component count for enhanced functionality while selectively powering down less critical components during deep power-down mode to maintain low power consumption.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different power management strategies are applied to different parts of the control device. The first peripheral circuit group receives full power in standby mode, while the second group receives reduced or selective power, allowing local optimization of power consumption based on component-specific requirements.

Inventive Principle:

Principle #3Local quality

3Loss of energy

If the first peripheral circuit group is completely powered down to reduce power consumption, then power consumption is reduced, but the ability to recognize exit commands deteriorates

Engineering Contradiction:

Improvepower consumption of deep power-down modeVSAvoidability to recognize exit command string

Core Design Contradiction:

Loss of energyVSEase of operation

Solution Approach 1:

The control device is divided into two peripheral circuit groups with different functional roles. The first group handles memory array control and can be fully powered down, while the second group includes the exit command string decoder that remains operational or is rapidly activatable to recognize and process exit commands.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The second peripheral circuit group acts as an intermediary that remains partially active during deep power-down mode. It receives and decodes exit commands from the input/output buffer, serving as a bridge between the fully powered input interface and the powered-down first peripheral circuit group, enabling command recognition without requiring full power restoration.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11456026B2Control device and memory system for deep power-down mode

Publication Date: 2022.09.27 WINBOND ELECTRONICS CORP

AI summary

A control device and a memory system are provided. The control device includes a first peripheral circuit group and a second peripheral circuit group. The first peripheral circuit group and a memory array are driven by a first voltage in a standby mode. The first peripheral circuit group provides a control command when recognizing that a command string is a deep power-down (DPD) execution command string. When receiving the control command, the second peripheral circuit group provides a DPD signal having a first logic value to stop providing the first voltage so that the memory system enters a DPD mode. In the DPD mode, when recognizing that the command string is a DPD exit command string, the second peripheral circuit group provides a DPD signal having a second logic value to provide the first voltage so that the memory system enters standby mode.