Memory Control Device Using Differential Address Generation
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Solution Overview
Problem
Existing data marshaling methods for SIMD processors require additional circuitry and restrict data alignment range, leading to performance delays and increased circuit area, especially when transferring large datasets for image processing.
Innovation Solution
A memory control device and method that utilize an absolute address and differential addresses to generate memory addresses sequentially, allowing data transfer without the need for explicit data marshaling instructions, thereby reducing circuit complexity and enhancing processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If data marshaling is performed by supplying read addresses to multiple memory banks individually, then data alignment is achieved, but circuit area increases due to address decoder and peripheral circuits
Solution Approach 1:
The patent segments the address generation process into two parts: a common absolute address stored in one register and individual differential addresses stored in separate registers for each memory bank. This segmentation allows each memory bank to be addressed independently through simple addition of differential addresses to the common base address, eliminating the need for complex address decoders while maintaining proper data alignment.
Solution Approach 2:
The patent introduces differential addresses as an intermediary mechanism between the common absolute address and the actual memory addresses. Each memory bank has its own differential address register that stores the offset from the common base address. This intermediary approach simplifies the address generation process and reduces circuit complexity while achieving the same data alignment effect.
2Speed
If data is transferred to internal memory without completed data marshaling, then processing speed increases, but data alignment is incorrect requiring subsequent realignment
Solution Approach 1:
The patent performs data marshaling in advance during the data transfer process itself. By pre-calculating and storing differential addresses for each memory bank before the actual data transfer, the system ensures that data is automatically aligned in the correct positions within internal memory without requiring subsequent realignment operations. This preliminary action eliminates the need for separate marshaling steps and maintains both speed and precision.
3Manufacturing precision
If data marshaling is performed after data transfer, then data alignment is achieved, but processing time increases due to additional realignment operations
Solution Approach 1:
The patent merges the data transfer operation with the data marshaling operation into a single unified process. By using the differential address mechanism, the system simultaneously achieves both data transfer and automatic alignment in one step, eliminating the need for separate post-transfer realignment operations. This merging of operations reduces processing time while maintaining correct data alignment.
Data Source
AI summary
A memory control device that transfers data from an external memory to a data processing unit having plural processing mechanisms, includes an absolute address storage unit that stores an absolute address serving as a common reference value in a given data transfer period; a differential address storage unit that stores plural differential addresses therein; a differential address selection unit that selects any one of the plurality of differential addresses in a given order; a memory address generation unit that combines any differential address selected by the differential address selection unit with the absolute address to generate a memory address; and a data transfer unit that inputs the memory address generated by the memory address generation unit to the external memory, reads the data from the memory address, and transfers the data to the data processing unit.


