Memory Control Circuit Unit Error Correction for Non-Volatile Storage
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Solution Overview
Problem
Rewritable non-volatile memory modules face challenges in accurately decoding data due to the error floor phenomenon, where iterative decoding operations fail to correct error bits effectively, especially when using block turbo code or low density parity check algorithms.
Innovation Solution
A data reading method that includes reading data from a rewritable non-volatile memory module, performing error correction decoding using a combination of column and row error correcting codes, searching for uncorrectable sub-data units, adjusting target sub-data units, and re-performing decoding to generate a corrected data stream, thereby enhancing data accuracy and error correction capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If iterative decoding operations are increased to correct data errors, then error correction capability is improved, but the number of error bits no longer reduces effectively due to error floor phenomenon
Solution Approach 1:
The patent divides the data into multiple sub-data units arranged in a matrix form, with separate column and row error correcting codes for each segment. This segmentation allows targeted error correction on specific sub-data units that fail to decode correctly, rather than treating the entire data stream uniformly. The matrix arrangement enables systematic identification and correction of error patterns across different segments.
Solution Approach 2:
The patent applies different error correction strategies to different sub-data units based on their error characteristics. By identifying which specific sub-data units contain uncorrectable errors, the system can selectively adjust only those local segments rather than re-decoding the entire data stream, thereby improving efficiency and effectiveness of error correction.
2Measurement precision
If bit flipping process is performed on uncorrectable sub-data units, then data reading accuracy is improved, but decoding operation complexity increases
Solution Approach 1:
The patent performs error correction decoding operations in a systematic sequence, first attempting standard decoding on all sub-data units, then identifying which units require bit flipping based on their error characteristics. This preliminary classification action determines the scope of subsequent bit flipping operations, preventing unnecessary complexity in cases where standard decoding already succeeds.
Solution Approach 2:
The patent implements a feedback mechanism where the results of initial decoding operations are used to determine which sub-data units need additional bit flipping correction. By feeding back the decoding results and error identification information, the system can selectively apply bit flipping only where necessary, avoiding redundant operations and reducing overall complexity.
Data Source
AI summary
A data reading method for a rewritable non-volatile memory module is provided. The method includes performing an error correction decoding operation on an user data stream according to an error checking and correcting (ECC) code to generate a first decoded data stream; searching uncorrectable sub-data units from decoded sub-data units of the first decoded data stream; selecting a target sub-data unit from the uncorrectable sub-data units; adjusting the target sub-data unit in the first decoded data stream to generate an adjusted user data stream; and re-performing the error correction decoding operation on the adjusted user data stream to generate a second decoded data stream; if the second decoded data stream has no error bit, transmitting the second decoded data stream as a corrected data stream to a host system.