Memory Control Circuit for HRE Bit-Aware LDPC Decoding
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Solution Overview
Problem
High Reliable Error (HRE) bits in rewritable non-volatile memory modules cause decreased bit error rate and decoding convergence speed during LDPC decoding, leading to potential decoding failures due to divergent log likelihood ratios.
Innovation Solution
A bit determining method that identifies HRE bits and adjusts corresponding decoding parameters to prevent interference with other bits, improving decoding success rates by re-decoding with specific parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If LDPC decoding is performed using HRE bits, then decoding can be executed, but the error floor region increases and decoding convergence speed decreases
Solution Approach 1:
The patent extracts HRE bits from the decoding process by identifying them through comparison of read values across multiple storage states. Once identified, these problematic bits are isolated and handled separately through specific decoding operations, preventing them from degrading the overall decoding performance and convergence speed
Solution Approach 2:
The patent applies different decoding strategies to different types of bits. HRE bits are identified and subjected to specific decoding operations tailored to their characteristics, while other bits use standard LDPC decoding. This localized approach optimizes the decoding process for each bit type, improving overall convergence speed and reliability
2Reliability
If HRE bits are not detected and handled specially, then the decoding process is simpler, but decoding may fail due to divergent log likelihood ratios
Solution Approach 1:
The patent performs preliminary detection of HRE bits before the main decoding process by comparing read values from multiple storage states. This advance identification allows the system to prepare appropriate decoding strategies for problematic bits, ensuring decoding success while maintaining a manageable process through systematic pre-processing
3Reliability
If standard decoding operations are used for all bits, then the decoding process is uniform and simple, but HRE bits cause error floor region increase and may cause decoding failure
Solution Approach 1:
The patent implements local quality by applying different decoding operations to different bit types. HRE bits identified through storage state comparison receive specialized decoding treatment, while other bits use standard LDPC decoding. This differentiated approach improves reliability for problematic bits without unnecessarily complicating the overall decoding process
Solution Approach 2:
The patent changes decoding parameters specifically for HRE bits based on their identified characteristics. By adjusting decoding parameters tailored to HRE bit properties rather than using uniform parameters for all bits, the system improves decoding success rate for problematic bits while maintaining efficiency for the majority of bits
Data Source
AI summary
A bit determining method, a memory control circuit unit and a memory storage device are provided. The method includes: reading a first storage state of a first memory cell to obtain a first value of a first significant bit; reading the first storage state of the first memory cell to obtain at least one second value of at least one second significant bit; performing a first decoding operation according to the at least one second value to obtain at least one third value of the decoded second significant bit; determining whether the first significant bit is a special bit according to the first storage state and a second storage state corresponding to the at least one third value; and if the first significant bit is the special bit, performing a corresponding decoding operation.