Memory Control Circuit Self-Refresh Data Integrity
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Solution Overview
Problem
Existing memory control circuits cannot maintain a DDR3-SDRAM in self-refresh mode when the memory controller is powered off and then restarted, leading to data integrity issues due to unstable memory reset signal control.
Innovation Solution
A memory control circuit with a mask circuit, determination unit, and output control circuit that masks the memory reset signal when the secondary power supply voltage is below a predetermined value, ensuring data integrity and maintaining the self-refresh mode even after power restoration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the memory controller is powered off to save energy, then power consumption is reduced, but the memory device cannot remain in self-refresh mode and data integrity is compromised
Solution Approach 1:
A reset signal masking circuit is introduced as an intermediary between the memory controller and the memory device. This circuit includes a mask signal input terminal, a reset signal input terminal, and an output terminal connected to the memory device. The circuit masks the reset signal under specific voltage conditions, allowing the memory device to maintain self-refresh mode and preserve data integrity even when the memory controller is powered off.
Solution Approach 2:
The system performs preliminary voltage level detection before the memory controller is fully powered off. When the second power supply voltage drops below a predetermined threshold while the first power supply remains active, the masking circuit proactively masks the reset signal to prevent it from reaching the memory device, thereby preserving data before power complete shutdown occurs.
2Reliability
If the memory reset signal is continuously monitored to maintain self-refresh mode, then data integrity is preserved, but the control circuit complexity increases
Solution Approach 1:
The control function is segmented into two independent parts: a voltage detection function that monitors the second power supply voltage level, and a reset signal masking function that acts on the detected voltage condition. This segmentation allows the system to maintain data integrity through simple voltage threshold detection and corresponding mask signal generation, avoiding the need for complex continuous monitoring and control logic.
Data Source
AI summary
A memory control circuit capable of holding a memory device in a self-refresh mode even when a memory controller is powered off and then restarted. The controller performs data memory reset processing including deleting data in a buffer of a volatile memory device which operates when supplied with power from a first power supply, by changing an effective memory reset signal after the voltage of a second power supply becomes equal to or higher than a predetermined value. The memory reset signal is masked when an effective mask signal is generated. Whether to keep the data is determined when an event occurs which makes the voltage of the second power supply lower than the reset reference value and the first power supply is on. The memory reset signal is masked by making the mask signal effective when the data is determined to be kept.