Memory Control Circuit Unit Super Physical Unit Configuration
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Solution Overview
Problem
In rewritable non-volatile memory modules, the uneven distribution of available physical erasing units across planes leads to inefficient usage and compatibility issues, particularly in TLC mode where multiple open blocks cannot exist in the same plane simultaneously.
Innovation Solution
A memory management method that configures available physical erasing units into two types of super physical units: one type includes units from different planes programmed simultaneously or alternately, and another type includes units from the same plane, with each unit programmed in specific programming modes to optimize usage and compatibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If physical erasing units are configured into super physical units from different planes for simultaneous programming, then writing speed is improved, but usage rate of physical erasing units deteriorates due to unequal distribution of available units across planes
Solution Approach 1:
The patent segments the configuration of super physical units into two types: first type super physical units formed from physical erasing units of different planes for simultaneous programming, and second type super physical units formed from physical erasing units of the same plane for sequential programming. This segmentation allows the system to optimize for speed when possible while ensuring complete utilization of all available physical erasing units across all planes.
Solution Approach 2:
The patent introduces a new dimension to super physical unit configuration by allowing units from the same plane to be grouped together (second type), breaking the traditional constraint that super physical units must only include units from different planes. This dimensional change in the configuration space enables complete utilization of all available physical erasing units regardless of their plane distribution.
2Productivity
If multiple open blocks in TLC mode are configured in the same plane, then physical erasing units are fully utilized, but system compatibility deteriorates
Solution Approach 1:
The patent applies local quality by configuring second type super physical units with physical erasing units from the same plane to operate in SLC mode rather than TLC mode. This localized mode change ensures compatibility with system requirements that prohibit multiple open TLC blocks in the same plane, while still enabling complete utilization of all available physical erasing units through the alternative same-plane configuration.
3Productivity
If physical erasing units from the same plane are configured as super physical units, then usage rate of physical erasing units is improved, but programming complexity increases due to sequential programming requirement
Solution Approach 1:
The patent introduces dynamics by making the programming mode flexible and adaptive: first type super physical units (from different planes) use simultaneous parallel programming for high speed, while second type super physical units (from the same plane) use sequential programming. The memory control circuit dynamically selects the appropriate programming approach based on the configuration type, optimizing performance while managing complexity.
Data Source
AI summary
A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes: configuring a plurality of first type super physical units and at least one second type super physical unit, where one first type super physical unit includes at least two available physical erasing units which may be programmed simultaneously, and one second type super physical unit includes at least two available physical erasing units which may not be programmed simultaneously. The method also includes: configuring the first type super physical unit as to be programmed based on a first programming mode or a second programming mode, and configuring the second type super physical unit as to be programmed only based on the first programming mode.