Memory Control Circuit Unit Table Redundancy for Latency Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Load table latency occurs in memory storage devices when all channels are busy, leading to processing time differences and reduced operational stability due to the need for memory controllers to wait for idle channels to access management tables.
Innovation Solution
Storing multiple copies of table information across physical groups in a rewritable non-volatile memory module and instructing reading from a non-default status group to reduce latency, ensuring consistent management information access without channel waiting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory controller waits for an idle channel to access management tables, then channel conflicts are avoided, but processing time increases and operational stability decreases
Solution Approach 1:
The patent creates a copy of the management table (first copy in first physical group, second copy in second physical group) so that when one channel is busy, the memory controller can immediately access the copied management table through another channel without waiting, thereby reducing processing time while maintaining data consistency
Solution Approach 2:
The management table is pre-copied to multiple physical groups before access is needed. This preliminary duplication ensures that when a channel becomes busy, the copy is already available in another physical group, eliminating the need to wait for channel availability and reducing access latency
2Loss of time
If multiple copies of table information are stored across physical groups, then access latency is reduced, but memory structure complexity increases
Solution Approach 1:
The patent segments the management table into multiple copies distributed across different physical groups (first physical group and second physical group). This segmentation allows parallel access through different channels simultaneously, reducing access latency while maintaining a structured and manageable memory organization
Solution Approach 2:
The patent changes the storage parameter by duplicating management table data across multiple physical groups rather than storing a single copy. This parameter change enables concurrent access from multiple channels, reducing access latency while the duplication follows a systematic pattern that manages complexity
Data Source
AI summary
A memory control method for a rewritable non-volatile memory module which includes a plurality of physical groups is provided according to an exemplary embodiment of the disclosure. The memory control method includes: storing first table information into a first physical group among the physical groups, wherein the first table information records management information corresponding to a first logical range; storing second table information into a second physical group among the physical groups, wherein the second table information also records the management information corresponding to the first logical range; and instructing a reading of the second table information from the second physical group to obtain the management information corresponding to the first logical range in response to that the first physical group is in a default status.