Memory Control Circuit Unit Wear Management via Dynamic Channel Segmentation
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Solution Overview
Problem
The use of MLC or TLC NAND flash memory modules to simulate SLC NAND flash memory modules leads to increased wear and reduced service life due to higher erasing counts, resulting in decreased performance and longevity of flash memory modules.
Innovation Solution
A data writing method that dynamically determines whether to write data into a first area or a second area based on the write amplification factor, using different programming modes and copyback operations to optimize data storage and extend the service life of the memory module.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MLC or TLC NAND flash memory modules are used to simulate SLC NAND flash memory modules, then write performance is improved, but service life is reduced due to higher erasing counts
Solution Approach 1:
The patent divides the memory module into multiple memory channels and further segments them into groups (e.g., first group, second group, third group). By selectively activating or deactivating specific memory channels or groups, the system can distribute write operations across multiple segments, reducing the erasing count on any single segment while maintaining overall write performance. This segmentation allows the system to simulate SLC behavior without concentrating wear on one channel.
2Speed
If the lower physical programming unit is used for writing data in SLC simulation mode, then write speed is improved, but wear of flash memory module increases
Solution Approach 1:
The patent implements dynamic management of memory channels and groups, where the system can activate or deactivate specific channels based on wear levels and performance requirements. This dynamic adjustment allows the system to switch between different programming units and channels, preventing any single lower physical programming unit from being overused. The dynamic nature enables load balancing across multiple channels, maintaining write speed while distributing wear.
3Productivity
If multiple memory channels are activated to improve write performance, then productivity increases, but control complexity increases
Solution Approach 1:
The patent applies different management strategies to different memory channels and groups based on their specific characteristics and wear levels. Instead of uniformly managing all channels, the system can selectively activate or deactivate specific channels or groups, applying local quality control. This approach allows complex multi-channel management to be broken down into simpler, independent decisions for each channel or group, reducing overall control complexity while maintaining performance.
Data Source
AI summary
A data writing method, a memory control circuit unit, and a memory storage apparatus are provided. The method includes: receiving a write command from a host system; and determining whether to write a data corresponding to the write command into a first area or a second area according to a write amplification factor of the first area, where if it is determined to write the data into the second area, copying the written data to the first area after writing the data.