Memory Control Circuit Unit Write Protect Pin Connection Detection

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Solution Overview

Problem

Existing methods for detecting whether a rewritable non-volatile memory module is connected to a memory control circuit unit are inefficient, often relying on timeouts from the ready/busy pin, which can lead to delayed error detection and increased detection time.

Innovation Solution

A method involving a memory control circuit unit that sets the output voltage of a write protect pin to a first logic level, sends a read status command, and determines connection status based on corresponding bit data in the status message received through independent control and data buses, allowing for immediate identification of module connection without relying on the ready/busy pin.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the ready/busy pin timeout method is used to detect memory module connection, then the detection method is simple to implement, but the detection time is excessively long and system responsiveness is poor

Engineering Contradiction:
Improvedetection method simplicityVSAvoiddetection time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent extracts the connection detection function from the ready/busy pin and relocates it to the write protect pin. By reading the status message from the data bus and checking the write protect bit, the detection process is separated from the time-consuming ready/busy pin timeout waiting, thus reducing detection time while maintaining implementation simplicity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical waiting/timing mechanism (ready/busy pin timeout) with an electronic status bit reading mechanism (write protect pin status in status message). This substitution eliminates the need for time-based detection and replaces it with immediate status bit checking, dramatically reducing detection time

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Loss of time

If the write protect pin status method is used to detect memory module connection, then the detection time is significantly reduced, but the device complexity increases due to additional control bus operations

Engineering Contradiction:
Improvedetection timeVSAvoidcontrol bus operations
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent utilizes the existing status message mechanism and data bus, which are already part of the normal memory communication interface. The write protect pin status bit in the status message serves dual purposes: indicating write protection state during normal operation and indicating connection status during detection, thereby avoiding additional dedicated detection hardware or protocols

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The status message, which is already being transmitted over the data bus for normal memory operations, is used to carry connection status information. The write protect pin status bit within this existing status message provides self-service for connection detection without requiring separate detection signals or additional communication overhead

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9710193B2Method of detecting memory modules, memory control circuit unit and storage apparatus
Publication Date: 2017.07.18 PHISON ELECTRONICS
  • US9710193B2 patent drawing
  • US9710193B2 patent drawing
  • US9710193B2 patent drawing

AI summary

A method of detecting a rewritable non-volatile memory module is provided. The method includes setting an output voltage of a write protect pin of a memory interface as a first logic level, giving a read status command and receiving a first status message. The method further includes determining whether a corresponding bit data in the first status message conforms to a status corresponding to the first logic level; and if yes, identifying that the rewritable non-volatile memory module has connected to the memory interface.