Memory Controller Analyzes Access Patterns for Shared Memory

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Solution Overview

Problem

Computer systems face high power consumption and decreased processing speed during large-scale data processing due to the use of high-standby power DRAM as main memory and the need for data transfer between multiple servers in distributed processing systems.

Innovation Solution

A memory device with a shared memory and a memory controller that analyzes access patterns and decides on optimal access methods for information processing devices, utilizing a combination of non-volatile and volatile memories with different characteristics to manage data access efficiently, including direct access and caching strategies to reduce power consumption and enhance processing speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If DRAM is used as main memory device, then high-speed data access is achieved, but power consumption increases due to high standby power

Engineering Contradiction:

Improvedata access speedVSAvoidstandby power

Core Design Contradiction:

SpeedVSUse of energy by stationary object

Solution Approach 1:

The memory system is segmented into multiple memory regions with different characteristics (first memory region with non-volatile memory for low standby power, second memory region with volatile memory for high-speed access). This allows the system to divide functionality across different memory types, achieving both low power consumption and high-speed access where needed.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different memory regions are assigned different characteristics based on local requirements. The first memory region uses non-volatile memory for data requiring low standby power, while the second memory region uses volatile memory for data requiring high-speed access. This local differentiation resolves the contradiction by optimizing each region for its specific purpose.

Inventive Principle:

Principle #3Local quality

2Productivity

If distributed processing with multiple servers is used, then processing capability is improved, but processing speed decreases due to data transfer requirements

Engineering Contradiction:

Improveprocessing capabilityVSAvoidprocessing speed

Core Design Contradiction:

ProductivityVSSpeed

Solution Approach 1:

The system merges multiple memory regions with different characteristics into a unified memory device that can be accessed by multiple information processing devices. This consolidation eliminates the need for data transfer between separate servers, allowing distributed processing while maintaining high processing speed through direct memory access.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The shared memory device acts as an intermediary between multiple information processing devices, providing a common data storage location that eliminates the need for inter-server data transfer. This mediator approach resolves the speed penalty associated with distributed processing by providing direct access to shared data.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10438665B2Memory device and information processing system

Publication Date: 2019.10.08 KIOXIA CORP

AI summary

According to one embodiment, a memory device is connected to one or more information processing devices. The memory device includes a shared memory and a memory controller. The memory controller is configured to analyze an access to the shared memory by the one or more information processing devices and decide on an access method for accessing the shared memory by the one or more information processing devices. The memory controller is configured to give an instruction indicating the decided access method to the one or more information processing devices.