Memory Controller Activation Candidate List for Address Mapping
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Solution Overview
Problem
Current memory controllers face inefficiencies in processing commands from hosts due to the time-consuming search for mapping information between logical and physical addresses, which hinders fast command processing and address mapping.
Innovation Solution
A memory controller and operating method that utilize an activation candidate list to determine target logical address ranges based on activation parameters, allowing for the transmission of activation logical address range information to the host, thereby reducing the need for host-based address mapping searches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the memory controller transmits all logical address range mapping information to the host, then the host can quickly process commands without searching for mapping information, but the transmission time and communication overhead increase
Solution Approach 1:
The patent extracts only the necessary portion of mapping information (activation candidate list with top N logical address ranges) from the complete mapping table and transmits it to the host. This selective extraction reduces transmission time and communication overhead while still enabling the host to quickly process the most frequently accessed commands without searching for mapping information.
2Reliability
If the memory controller maintains a complete mapping table for all logical addresses, then accurate address mapping is ensured, but the memory controller's storage requirements and processing overhead increase
Solution Approach 1:
The patent segments the complete mapping table into two parts: (1) an activation candidate list containing the top N logical address ranges with highest access probability that are transmitted to the host, and (2) the remaining mapping information that stays in the memory controller. This segmentation reduces the memory controller's storage requirements and processing overhead while maintaining accurate address mapping for the most frequently accessed addresses through the host-side cache.
3Reliability
If the host searches for mapping information in the complete mapping table, then all address mappings can be resolved, but the command processing time increases
Solution Approach 1:
The patent performs preliminary action by having the memory controller pre-calculate and transmit the activation candidate list containing the top N logical address ranges with highest access probability to the host before command processing. The host then caches this information locally, enabling it to quickly resolve the most frequently accessed address mappings without performing time-consuming searches in the complete mapping table, thus reducing command processing time while maintaining mapping information completeness.
Data Source
AI summary
The embodiments of the present disclosure relate to a memory controller and operating method thereof. According to embodiments of the present disclosure, the memory controller may include a memory configured to store an activation candidate list including one or more nodes each indicating a logical address range that satisfies a preset activation candidate condition, and a processor configured to determine a target node based on activation parameters of logical address ranges indicated by respective nodes included in the activation candidate list, determine, as activation logical address ranges, one or more logical address ranges from the activation candidate list based on the target node, and transmit information indicating the activation logical address range to a host.