Memory Controller Adaptive Read Voltage for Data Recovery

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Solution Overview

Problem

Existing memory systems face challenges in maintaining data reliability due to high error bit counts during read operations, as conventional data recovery methods like read retry and e-boost operations are inefficient and often fail to recover data effectively.

Innovation Solution

A memory system with a memory controller that corrects errors in read data and determines whether to perform a refresh or read reclaim operation based on the number of error bits, improving data reliability by selectively managing page or block operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional read retry and e-boost operations are used for data recovery, then data reliability should be improved, but these operations are inefficient and often fail to recover data effectively

Engineering Contradiction:
Improvedata reliabilityVSAvoiddata recovery efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the operational parameters by performing multiple read operations with different read voltages (e.g., first read voltage, second read voltage higher than first, third read voltage higher than second) instead of using conventional read retry and e-boost operations. This parameter variation allows the system to adapt to deteriorating data conditions and successfully read data that would otherwise be unrecoverable, thereby improving both data reliability and recovery efficiency

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system dynamically adjusts the read voltage based on the number of error bits detected in previous read operations. When error bits exceed a threshold, the system transitions to reading with a higher voltage, creating a dynamic adaptation mechanism that responds to actual data conditions rather than following fixed conventional procedures

Inventive Principle:
Principle #15Dynamics

2Reliability

If refresh operations are performed on all pages, then data reliability is improved, but system performance and efficiency deteriorate due to unnecessary operations

Engineering Contradiction:
Improvedata reliabilityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by performing refresh operations selectively on only those pages that exhibit data deterioration (pages with error bits exceeding a threshold) rather than refreshing all pages uniformly. This localized approach maintains data reliability for affected pages while avoiding unnecessary operations on healthy pages, thus preserving system performance

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system uses feedback from error bit detection during read operations to determine which pages require refresh operations. The number of error bits serves as feedback that triggers targeted refresh actions, creating a closed-loop control mechanism that improves reliability only where needed and maintains overall system efficiency

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11461171B2Memory system and method of operating the same
Publication Date: 2022.10.04 SK HYNIX INC
  • US11461171B2 patent drawing
  • US11461171B2 patent drawing
  • US11461171B2 patent drawing

AI summary

The present technology relates to an electronic device. A memory system for increasing reliability of data includes a memory device including a plurality of pages, and a memory controller configured to correct an error in read data obtained by reading a selected page among the plurality of pages, and determine whether to perform a refresh operation on the selected page based on a number of error bits included in the read data. The memory controller comprises a normal read operation controller configured to control a read operation on the selected page and determine the number of error bits in the read data, an error correction performance component configured to correct the read data, and a data recovery controller configured to control the refresh operation on the selected page based on the number of error bits in the read data when the error in the read data is corrected.