Nonvolatile Memory Controller Adaptive Readout Timing
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Solution Overview
Problem
Existing storage devices face inefficiencies in input/output operations due to the use of timing parameters with predefined fixed time values, which can decrease data transfer efficiency even as data input/output speed increases.
Innovation Solution
The method involves a storage device with a nonvolatile memory device and a controller that issues a second readout command to transfer both status information and read data, allowing the controller to instantly check the status of the nonvolatile memory device and reduce waiting times for issuing commands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a timing parameter with a predefined fixed time value is used to transmit commands from controller to nonvolatile memory device, then the command transmission can be simplified, but the input/output efficiency of data transfer decreases
Solution Approach 1:
The patent applies dynamics by changing the timing parameter from a fixed predefined value to a variable value that is dynamically adjusted based on the actual status of the nonvolatile memory device. The controller waits for a ready signal from the memory device before issuing the readout command, making the timing adaptive to the device's actual state rather than using a rigid fixed schedule, thereby improving input/output efficiency while maintaining command transmission simplicity.
2Reliability
If the controller issues a status command to check completion status before issuing readout command, then the data transfer accuracy can be ensured, but the waiting time increases
Solution Approach 1:
The patent merges the status checking function and the readout command issuance into a single integrated operation. Instead of issuing a separate status command followed by a separate readout command after waiting for completion, the controller issues a readout command that inherently includes status verification. This combined approach ensures data transfer accuracy by verifying status while eliminating the separate waiting period, thus reducing overall waiting time.
Solution Approach 2:
The patent implements feedback by having the nonvolatile memory device signal its readiness status directly to the controller before the readout operation begins. The controller uses this feedback signal to determine when to issue the readout command, ensuring that data transfer accuracy is maintained through proper timing while minimizing waiting time by avoiding unnecessary sequential status checks.
3Speed
If the data input/output speed is increased, then the data transfer performance improves, but the input/output efficiency decreases due to fixed timing parameters
Solution Approach 1:
The patent applies parameter changes by modifying the timing parameter from a fixed predefined value to a variable value that adapts to the actual data transfer conditions. The controller adjusts the timing based on the nonvolatile memory device's status and the data input/output speed, allowing the system to maintain high data transfer performance while improving input/output efficiency through dynamic timing optimization rather than rigid fixed timing.
Data Source
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AI summary
A method of operating a storage device that includes a nonvolatile memory device and a controller that controls operation of the nonvolatile memory device includes issuing, by the controller, a first command to the nonvolatile memory device, reading, by the nonvolatile memory device, first data from a memory cell array into a page buffer of the nonvolatile memory device, in response to the first command, issuing, by the controller, a second command to the nonvolatile memory device, and outputting, by the nonvolatile memory device to the controller, in response to the second command, status information indicating whether a read operation according to the first command has been completed and second data obtained from the page buffer of the nonvolatile memory device.