Memory Controller Address Feedback Loop for Error Correction
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Solution Overview
Problem
Memory systems face errors due to corrupted target addresses during communication between the controller and memory device, leading to incorrect access operations, which existing technologies fail to effectively detect and correct.
Innovation Solution
A memory system with a controller that transmits a target address for access operations, receives a reference address from the memory device, and selectively re-performs the access operation based on the reference address, correcting errors by comparing the reference address with the target address and re-performing the operation when they differ.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the controller transmits target address to memory device for access operation, then the access operation can be performed, but communication errors may corrupt the target address leading to incorrect access operations
Solution Approach 1:
The memory device transmits the reference address back to the controller as feedback. The controller compares this reference address with the originally transmitted target address to detect whether corruption occurred during communication. This feedback mechanism enables error detection and triggers re-performance of the access operation when necessary, thereby resolving the technical contradiction between maintaining access operation accuracy and preventing communication errors.
Solution Approach 2:
The system performs preliminary error detection by comparing the reference address with the target address before finalizing the access operation. When a mismatch is detected, the system preemptively re-performs the access operation to correct potential errors, preventing incorrect data access before it can cause problems.
2Reliability
If the controller re-performs the access operation when reference address differs from target address, then communication errors are corrected, but additional time is required for re-performance
Solution Approach 1:
The selective re-performance mechanism uses feedback from the address comparison to determine whether re-performance is necessary. The controller only re-performs the access operation when the reference address differs from the target address, avoiding unnecessary re-operations when no error occurred. This conditional approach resolves the contradiction by balancing error correction needs with time efficiency.
Solution Approach 2:
The system changes the operational parameter (re-performance) based on the detected error condition. When the address comparison indicates an error, the parameter changes from single-performance mode to re-performance mode, dynamically adjusting the access operation strategy to maintain data integrity while minimizing time loss.
Data Source
AI summary
A memory system includes a memory device; and a controller configured to transmit a target address to the memory device for performing an access operation, receive from the memory device a reference address at which the access operation has been performed, and selectively re-perform the access operation based on the reference address. The controller re-performs the access operation when the reference address is different from the target address.