Memory Controller Address Mapping for Consistent Write Throughput

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Solution Overview

Problem

Existing data storage devices face challenges in maintaining consistent write performance across varying workloads due to address mapping inefficiencies, particularly when logic addresses are not uniformly distributed, leading to inconsistent throughput and performance.

Innovation Solution

A data storage device with a memory controller that extracts a key value from a modified logic address, generates an index based on this key value, and maps it to a physical address, ensuring random distribution and efficient storage management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If address translation is performed using conventional mapping methods, then data can be stored and retrieved, but write performance becomes inconsistent under varying workload types due to non-uniform logic address distribution

Engineering Contradiction:
Improvewrite performance consistencyVSAvoidperformance stability under varying workloads
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the parameter of address mapping by extracting key values from modified logic addresses and using these key values to generate indices for mapping to physical addresses. This transformation of the addressing parameter ensures uniform distribution of write operations across memory regions regardless of the original logic address pattern, thereby maintaining consistent write performance under varying workload types

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediary key value that acts as a mediator between the logic address and physical address. The key value is extracted from the modified logic address and used to generate an index that maps to the physical address. This intermediary transformation layer ensures that non-uniform logic address distribution does not directly translate to non-uniform physical address access patterns, maintaining performance consistency

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If logic addresses are directly mapped to physical addresses without modification, then mapping is simple, but data distribution across memory regions becomes non-uniform leading to performance degradation

Engineering Contradiction:
Improvedata distribution uniformityVSAvoidaddress mapping complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the logic address into a modified logic address from which a key value is extracted. This segmentation allows the system to use only the necessary key value portion for generating the mapping index, achieving uniform data distribution while keeping the mapping process manageable through structured breakdown of the address components

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transforms the one-dimensional logic address into a multi-dimensional mapping process by generating a modified logic address, extracting a key value, and using it to create an index that maps to the physical address. This dimensional transformation ensures uniform data distribution across memory regions while maintaining a systematic and manageable mapping complexity through structured address transformation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20260037449A1Data storage device to efficiently manage map data and method of operating the same
Publication Date: 2026.02.05 SK HYNIX INC
  • US20260037449A1 patent drawing
  • US20260037449A1 patent drawing
  • US20260037449A1 patent drawing

AI summary

A data storage device may include a memory device and a memory controller. The memory controller is configured to extract a key value from a modified logic address, and map, to a physical address of the memory device, an index generated based on the modified logic address and the key value.