Memory Controller ALU FPU In-Memory Arithmetic

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Solution Overview

Problem

Modern processors face delays in pipeline operation due to the need to load data from memory before executing instructions, and lack of instructions for separate memory sources and destinations, which hampers efficient arithmetic and Boolean operations.

Innovation Solution

Introducing MEM+OP instructions that allow a memory controller to perform arithmetic or Boolean operations on integer or floating-point data, using an ALU or FPU, and supporting variants like VPDPBUSD and VPDPWSSD to accelerate in-memory database query evaluations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is loaded into the processor before execution, then arithmetic operations can be performed, but pipeline delays occur and processing efficiency decreases

Engineering Contradiction:

Improveinstruction execution speedVSAvoidpipeline delay

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent extracts the arithmetic logic unit from the traditional processor location and places it directly within the memory controller. This allows arithmetic operations to be performed at the memory location itself, eliminating the need to load data into the processor before execution, thereby removing pipeline delays and improving instruction execution speed.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The memory controller acts as an intermediary between memory and the processor, gaining enhanced capabilities to perform arithmetic operations directly on stored data. This intermediary role allows the system to bypass traditional load-execution cycles, reducing processing time and improving overall productivity.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If separate memory sources and destinations are not supported, then memory operations are limited, but arithmetic and Boolean operations become inefficient

Engineering Contradiction:

Improvearithmetic operation efficiencyVSAvoidmemory operation capability

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The memory controller is enhanced with an arithmetic logic unit, making it a multi-functional device that can both manage memory operations and perform arithmetic and Boolean operations. This universality allows separate memory sources and destinations to be supported, improving both arithmetic operation efficiency and memory operation versatility simultaneously.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS20230221958A1Memory controller with arithmetic logic unit and/or floating point unit

Publication Date: 2023.07.13 INTEL CORP

AI summary

Techniques for performing an operation at a memory controller are described. An example includes decoder circuitry to decode a single instruction, the single instruction to include one or more fields for an opcode to indicate an arithmetic or Boolean operation to be performed by a memory controller, and one or more fields to identify at least one source location; and execution circuitry of the memory controller to execute the decoded instruction according to the opcode.